vhdl: recognize ext/sxt from std_logic_arith.

1 files changed, 10 insertions, 0 deletions

diff --git a/src/vhdl/vhdl-ieee-std_logic_arith.adb b/src/vhdl/vhdl-ieee-std_logic_arith.adb
index 4c2b517ec..c1d7caccf 100644
--- a/src/vhdl/vhdl-ieee-std_logic_arith.adb
+++ b/src/vhdl/vhdl-ieee-std_logic_arith.adb
@@ -397,6 +397,16 @@ package body Vhdl.Ieee.Std_Logic_Arith is
                         Def := Handle_Cmp (Eq_Patterns);
                      when Name_Op_Inequality =>
                         Def := Handle_Cmp (Ne_Patterns);
+                     when Name_Ext =>
+                        if Arg1_Kind /= Type_Slv or Arg2_Kind /= Type_Int then
+                           raise Error;
+                        end if;
+                        Def := Iir_Predefined_Ieee_Std_Logic_Arith_Ext;
+                     when Name_Sxt =>
+                        if Arg1_Kind /= Type_Slv or Arg2_Kind /= Type_Int then
+                           raise Error;
+                        end if;
+                        Def := Iir_Predefined_Ieee_Std_Logic_Arith_Sxt;
                      when others =>
                         null;
                   end case;