vhdl: replace base_type with parent_type in nodes

Only for subtype definition and remove base_type in type definitions.
Allows to better track the addition of contraints.

1 files changed, 1 insertions, 0 deletions

diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb
index db368c380..a6a0559e4 100644
--- a/src/vhdl/vhdl-ieee-numeric.adb
+++ b/src/vhdl/vhdl-ieee-numeric.adb
@@ -21,6 +21,7 @@ with Vhdl.Std_Package;
 with Std_Names; use Std_Names;
 with Vhdl.Errors; use Vhdl.Errors;
 with Vhdl.Ieee.Std_Logic_1164;
+with Vhdl.Utils; use Vhdl.Utils;
 
 package body Vhdl.Ieee.Numeric is
    type Pkg_Kind is (Pkg_Std, Pkg_Bit);