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author | Tristan Gingold <tgingold@free.fr> | 2022-06-06 08:35:16 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-06-06 08:35:16 +0200 |
commit | 26d9756273a66c4bd359b89db4829edcdb30e522 (patch) | |
tree | 7400248e9e4eca0e62e535047388269bd7c07d83 /src/vhdl/vhdl-ieee-math_real.adb | |
parent | c0b6dbfcc55da8cde4ad00782f0b27cd3abba6e6 (diff) | |
download | ghdl-26d9756273a66c4bd359b89db4829edcdb30e522.tar.gz ghdl-26d9756273a66c4bd359b89db4829edcdb30e522.tar.bz2 ghdl-26d9756273a66c4bd359b89db4829edcdb30e522.zip |
vhdl-ieee-math_real: recognize more operations
Diffstat (limited to 'src/vhdl/vhdl-ieee-math_real.adb')
-rw-r--r-- | src/vhdl/vhdl-ieee-math_real.adb | 37 |
1 files changed, 26 insertions, 11 deletions
diff --git a/src/vhdl/vhdl-ieee-math_real.adb b/src/vhdl/vhdl-ieee-math_real.adb index d11030d49..1881bb322 100644 --- a/src/vhdl/vhdl-ieee-math_real.adb +++ b/src/vhdl/vhdl-ieee-math_real.adb @@ -16,11 +16,13 @@ with Std_Names; use Std_Names; +with Vhdl.Std_Package; + package body Vhdl.Ieee.Math_Real is procedure Extract_Declarations (Pkg : Iir_Package_Declaration) is Decl : Iir; - Predef : Iir_Predefined_Functions; + Def : Iir_Predefined_Functions; begin Math_Real_Pkg := Pkg; @@ -36,28 +38,41 @@ package body Vhdl.Ieee.Math_Real is case Get_Kind (Decl) is when Iir_Kind_Function_Declaration => - Predef := Iir_Predefined_None; + Def := Iir_Predefined_None; case Get_Identifier (Decl) is + when Name_Mod => + Def := Iir_Predefined_Ieee_Math_Real_Mod; when Name_Ceil => - Predef := Iir_Predefined_Ieee_Math_Real_Ceil; + Def := Iir_Predefined_Ieee_Math_Real_Ceil; when Name_Floor => - Predef := Iir_Predefined_Ieee_Math_Real_Floor; + Def := Iir_Predefined_Ieee_Math_Real_Floor; when Name_Round => - Predef := Iir_Predefined_Ieee_Math_Real_Round; + Def := Iir_Predefined_Ieee_Math_Real_Round; when Name_Log2 => - Predef := Iir_Predefined_Ieee_Math_Real_Log2; + Def := Iir_Predefined_Ieee_Math_Real_Log2; when Name_Sin => - Predef := Iir_Predefined_Ieee_Math_Real_Sin; + Def := Iir_Predefined_Ieee_Math_Real_Sin; when Name_Cos => - Predef := Iir_Predefined_Ieee_Math_Real_Cos; + Def := Iir_Predefined_Ieee_Math_Real_Cos; when Name_Arctan => - Predef := Iir_Predefined_Ieee_Math_Real_Arctan; + Def := Iir_Predefined_Ieee_Math_Real_Arctan; when Name_Op_Exp => - Predef := Iir_Predefined_Ieee_Math_Real_Pow; + declare + use Vhdl.Std_Package; + Inter : constant Iir := + Get_Interface_Declaration_Chain (Decl); + Itype : constant Iir := Get_Type (Inter); + begin + if Itype = Integer_Subtype_Definition then + Def := Iir_Predefined_Ieee_Math_Real_Pow_Int_Real; + elsif Itype = Real_Subtype_Definition then + Def := Iir_Predefined_Ieee_Math_Real_Pow_Real_Real; + end if; + end; when others => null; end case; - Set_Implicit_Definition (Decl, Predef); + Set_Implicit_Definition (Decl, Def); when Iir_Kind_Constant_Declaration => null; when others => |