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authorTristan Gingold <tgingold@free.fr>2022-02-22 20:58:53 +0100
committerTristan Gingold <tgingold@free.fr>2022-02-22 20:58:53 +0100
commit7526637883e495d3c8656602075db4d641747b73 (patch)
tree5d2e336cea5e1a7a62921abda7f8c3b957440232 /src/vhdl/vhdl-annotations.adb
parent81441654d58fd9f69c1ca694915ffbb40f7fc519 (diff)
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synth: fix handling of record constraints in subtype. Fix #1961
Diffstat (limited to 'src/vhdl/vhdl-annotations.adb')
-rw-r--r--src/vhdl/vhdl-annotations.adb23
1 files changed, 19 insertions, 4 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb
index 630f3ef84..9fc9788bf 100644
--- a/src/vhdl/vhdl-annotations.adb
+++ b/src/vhdl/vhdl-annotations.adb
@@ -340,8 +340,8 @@ package body Vhdl.Annotations is
then
-- This subtype has created a new anonymous subtype for the
-- element.
- Annotate_Type_Definition
- (Block_Info, Get_Element_Subtype (Def));
+ El := Get_Element_Subtype (Def);
+ Annotate_Type_Definition (Block_Info, El);
end if;
if Flag_Synthesis then
-- For the bounds.
@@ -378,8 +378,23 @@ package body Vhdl.Annotations is
when Iir_Kind_Record_Subtype_Definition =>
if Flag_Synthesis then
- -- For the offsets.
- Create_Object_Info (Block_Info, Def, Kind_Type);
+ declare
+ List : constant Iir_Flist :=
+ Get_Elements_Declaration_List (Def);
+ El : Iir;
+ El_Type : Iir;
+ begin
+ for I in Flist_First .. Flist_Last (List) loop
+ El := Get_Nth_Element (List, I);
+ if Get_Subtype_Indication (El) /= Null_Iir then
+ El_Type := Get_Type (El);
+ Annotate_Anonymous_Type_Definition
+ (Block_Info, El_Type);
+ end if;
+ end loop;
+ -- For the offsets.
+ Create_Object_Info (Block_Info, Def, Kind_Type);
+ end;
end if;
when Iir_Kind_Access_Type_Definition =>