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authorTristan Gingold <tgingold@free.fr>2019-08-20 04:54:29 +0200
committerTristan Gingold <tgingold@free.fr>2019-08-20 04:54:29 +0200
commit47b4650272ce425223da826b0de5bb7286036168 (patch)
tree3778ae11ddea6e8f5bc69909a724f11029e35573 /src/vhdl/vhdl-annotations.adb
parentb77eb1a27fa6838c7194a44f8d872005d08e6ac7 (diff)
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vhdl: handle assume in verification units.
Diffstat (limited to 'src/vhdl/vhdl-annotations.adb')
-rw-r--r--src/vhdl/vhdl-annotations.adb3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb
index d3d959da6..b23e4b6e6 100644
--- a/src/vhdl/vhdl-annotations.adb
+++ b/src/vhdl/vhdl-annotations.adb
@@ -1165,7 +1165,8 @@ package body Vhdl.Annotations is
case Get_Kind (Item) is
when Iir_Kind_Psl_Default_Clock =>
null;
- when Iir_Kind_Psl_Assert_Directive =>
+ when Iir_Kind_Psl_Assert_Directive
+ | Iir_Kind_Psl_Assume_Directive =>
null;
when others =>
Error_Kind ("annotate_vunit_declaration", Item);