Add support for conditional assignments.

3 files changed, 65 insertions, 18 deletions

diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb
index 25e9ed833..2dfc6c57e 100644
--- a/src/vhdl/translate/trans-chap7.adb
+++ b/src/vhdl/translate/trans-chap7.adb
@@ -432,6 +432,8 @@ package body Trans.Chap7 is
    function Translate_String_Literal (Str : Iir; Res_Type : Iir) return O_Enode
    is
       Str_Type : constant Iir := Get_Type (Str);
+      Is_Static : Boolean;
+      Vtype : Iir;
       Var      : Var_Type;
       Info     : Type_Info_Acc;
       Res      : O_Cnode;
@@ -452,12 +454,24 @@ package body Trans.Chap7 is
             when others =>
                raise Internal_Error;
          end case;
-         Res := Translate_Static_Implicit_Conv (Res, Str_Type, Res_Type);
-         Info := Get_Info (Res_Type);
+         Is_Static :=
+           Get_Type_Staticness (Get_Index_Type (Res_Type, 0)) = Locally;
+
+         if Is_Static then
+            Res := Translate_Static_Implicit_Conv (Res, Str_Type, Res_Type);
+            Vtype := Res_Type;
+         else
+            Vtype := Str_Type;
+         end if;
+         Info := Get_Info (Vtype);
          Var := Create_Global_Const
            (Create_Uniq_Identifier, Info.Ortho_Type (Mode_Value),
             O_Storage_Private, Res);
          R := New_Address (Get_Var (Var), Info.Ortho_Ptr_Type (Mode_Value));
+         if not Is_Static then
+            R := Translate_Implicit_Conv
+              (R, Str_Type, Res_Type, Mode_Value, Str);
+         end if;
          return R;
       else
          return Translate_Implicit_Conv
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb
index d939ce46a..3ca0200e4 100644
--- a/src/vhdl/translate/trans-chap8.adb
+++ b/src/vhdl/translate/trans-chap8.adb
@@ -4006,7 +4006,7 @@ package body Trans.Chap8 is
       Chap9.Destroy_Types (Target);
    end Translate_Direct_Signal_Assignment;
 
-   procedure Translate_Signal_Assignment_Statement (Stmt : Iir)
+   procedure Translate_Simple_Signal_Assignment_Statement (Stmt : Iir)
    is
       Target      : constant Iir := Get_Target (Stmt);
       Target_Type : constant Iir := Get_Type (Target);
@@ -4166,7 +4166,7 @@ package body Trans.Chap8 is
          Close_Temp;
       end;
       Chap9.Destroy_Types (Target);
-   end Translate_Signal_Assignment_Statement;
+   end Translate_Simple_Signal_Assignment_Statement;
 
    procedure Translate_Statement (Stmt : Iir)
    is
@@ -4194,10 +4194,28 @@ package body Trans.Chap8 is
             | Iir_Kind_Exit_Statement =>
             Translate_Exit_Next_Statement (Stmt);
 
-         when Iir_Kind_Signal_Assignment_Statement =>
-            Translate_Signal_Assignment_Statement (Stmt);
+         when Iir_Kind_Simple_Signal_Assignment_Statement =>
+            Translate_Simple_Signal_Assignment_Statement (Stmt);
          when Iir_Kind_Variable_Assignment_Statement =>
             Translate_Variable_Assignment_Statement (Stmt);
+         when Iir_Kind_Conditional_Variable_Assignment_Statement =>
+            declare
+               C_Stmt : Iir;
+            begin
+               C_Stmt :=
+                 Canon.Canon_Conditional_Variable_Assignment_Statement (Stmt);
+               Trans.Update_Node_Infos;
+               Translate_If_Statement (C_Stmt);
+            end;
+         when Iir_Kind_Conditional_Signal_Assignment_Statement =>
+            declare
+               C_Stmt : Iir;
+            begin
+               C_Stmt :=
+                 Canon.Canon_Conditional_Signal_Assignment_Statement (Stmt);
+               Trans.Update_Node_Infos;
+               Translate_If_Statement (C_Stmt);
+            end;
 
          when Iir_Kind_Null_Statement =>
             --  A null statement is translated to a NOP, so that the
diff --git a/src/vhdl/translate/trans_analyzes.adb b/src/vhdl/translate/trans_analyzes.adb
index 8147e93bd..799930a80 100644
--- a/src/vhdl/translate/trans_analyzes.adb
+++ b/src/vhdl/translate/trans_analyzes.adb
@@ -48,26 +48,41 @@ package body Trans_Analyzes is
       return Walk_Continue;
    end Extract_Driver_Target;
 
+   procedure Extract_Has_After (Wf : Iir) is
+   begin
+      if Wf /= Null_Iir
+        and then Get_Chain (Wf) = Null_Iir
+        and then Get_Time (Wf) = Null_Iir
+        and then Get_Kind (Get_We_Value (Wf)) /= Iir_Kind_Null_Literal
+      then
+         Has_After := False;
+      else
+         Has_After := True;
+      end if;
+   end Extract_Has_After;
+
    function Extract_Driver_Stmt (Stmt : Iir) return Walk_Status
    is
       Status : Walk_Status;
       pragma Unreferenced (Status);
-      We : Iir;
    begin
       case Get_Kind (Stmt) is
-         when Iir_Kind_Signal_Assignment_Statement =>
-            We := Get_Waveform_Chain (Stmt);
-            if We /= Null_Iir
-              and then Get_Chain (We) = Null_Iir
-              and then Get_Time (We) = Null_Iir
-              and then Get_Kind (Get_We_Value (We)) /= Iir_Kind_Null_Literal
-            then
-               Has_After := False;
-            else
-               Has_After := True;
-            end if;
+         when Iir_Kind_Simple_Signal_Assignment_Statement =>
+            Extract_Has_After (Get_Waveform_Chain (Stmt));
             Status := Walk_Assignment_Target
               (Get_Target (Stmt), Extract_Driver_Target'Access);
+         when Iir_Kind_Conditional_Signal_Assignment_Statement =>
+            declare
+               Cond_Wf : Iir;
+            begin
+               Cond_Wf := Get_Conditional_Waveform_Chain (Stmt);
+               while Cond_Wf /= Null_Iir loop
+                  Extract_Has_After (Get_Waveform_Chain (Cond_Wf));
+                  Cond_Wf := Get_Chain (Cond_Wf);
+               end loop;
+               Status := Walk_Assignment_Target
+                 (Get_Target (Stmt), Extract_Driver_Target'Access);
+            end;
          when Iir_Kind_Procedure_Call_Statement =>
             declare
                Call : constant Iir := Get_Procedure_Call (Stmt);