vhdl: add scalar_size. Size of scalar types is computed during analysis.

5 files changed, 25 insertions, 55 deletions

diff --git a/src/vhdl/translate/trans-chap2.adb b/src/vhdl/translate/trans-chap2.adb
index ac58068af..7badaeafb 100644
--- a/src/vhdl/translate/trans-chap2.adb
+++ b/src/vhdl/translate/trans-chap2.adb
@@ -1471,6 +1471,7 @@ package body Trans.Chap2 is
                   | Type_Int32
                   | Type_Fp64
                   | Type_Token_Type
+                  | Type_Scalar_Size
                   | Type_Name_Id =>
                   null;
             end case;
diff --git a/src/vhdl/translate/trans-chap3.adb b/src/vhdl/translate/trans-chap3.adb
index 082a20810..b0f61fe7e 100644
--- a/src/vhdl/translate/trans-chap3.adb
+++ b/src/vhdl/translate/trans-chap3.adb
@@ -27,7 +27,6 @@ with Trans.Chap7;
 with Trans.Chap14;
 with Trans_Decls; use Trans_Decls;
 with Trans.Helpers2; use Trans.Helpers2;
-with Translation;
 
 package body Trans.Chap3 is
    use Trans.Helpers;
@@ -332,45 +331,21 @@ package body Trans.Chap3 is
    --  Integer  --
    ---------------
 
-   --  Return the number of bits (32 or 64) required to represent the
-   --  (integer or physical) type definition DEF.
-   type Type_Precision is (Precision_32, Precision_64);
-   function Get_Type_Precision (Def : Iir) return Type_Precision
-   is
-      St     : constant Iir :=
-        Get_Subtype_Definition (Get_Type_Declarator (Def));
-      L, H   : Iir;
-      Lv, Hv : Int64;
-      subtype Int64_32 is Int64 range -(2 ** 31) .. 2 ** 31 - 1;
-   begin
-      Get_Low_High_Limit (Get_Range_Constraint (St), L, H);
-      Lv := Get_Value (L);
-      Hv := Get_Value (H);
-      if Lv in Int64_32 and then Hv in Int64_32 then
-         return Precision_32;
-      else
-         if Translation.Flag_Only_32b then
-            Error_Msg_Sem
-              (+St, "range of %n is too large", +Get_Type_Declarator (St));
-            return Precision_32;
-         end if;
-         return Precision_64;
-      end if;
-   end Get_Type_Precision;
-
    procedure Translate_Integer_Type (Def : Iir_Integer_Type_Definition)
    is
       Info : constant Type_Info_Acc := Get_Info (Def);
    begin
-      case Get_Type_Precision (Def) is
-         when Precision_32 =>
+      case Get_Scalar_Size (Def) is
+         when Scalar_32 =>
             Info.Ortho_Type (Mode_Value) := New_Signed_Type (32);
             Info.Type_Mode := Type_Mode_I32;
             Info.B.Align := Align_32;
-         when Precision_64 =>
+         when Scalar_64 =>
             Info.Ortho_Type (Mode_Value) := New_Signed_Type (64);
             Info.Type_Mode := Type_Mode_I64;
             Info.B.Align := Align_64;
+         when others =>
+            raise Internal_Error;
       end case;
       --  Integers are always in their ranges.
       Info.S.Nocheck_Low := True;
@@ -406,15 +381,17 @@ package body Trans.Chap3 is
    is
       Info : constant Type_Info_Acc := Get_Info (Def);
    begin
-      case Get_Type_Precision (Def) is
-         when Precision_32 =>
+      case Get_Scalar_Size (Def) is
+         when Scalar_32 =>
             Info.Ortho_Type (Mode_Value) := New_Signed_Type (32);
             Info.Type_Mode := Type_Mode_P32;
             Info.B.Align := Align_32;
-         when Precision_64 =>
+         when Scalar_64 =>
             Info.Ortho_Type (Mode_Value) := New_Signed_Type (64);
             Info.Type_Mode := Type_Mode_P64;
             Info.B.Align := Align_64;
+         when others =>
+            raise Internal_Error;
       end case;
       --  Physical types are always in their ranges.
       Info.S.Nocheck_Low := True;
diff --git a/src/vhdl/translate/trans-chap9.adb b/src/vhdl/translate/trans-chap9.adb
index c10c0d24f..58533e37b 100644
--- a/src/vhdl/translate/trans-chap9.adb
+++ b/src/vhdl/translate/trans-chap9.adb
@@ -1388,6 +1388,7 @@ package body Trans.Chap9 is
                  | Type_Int32
                  | Type_Fp64
                  | Type_Token_Type
+                 | Type_Scalar_Size
                  | Type_Name_Id =>
                   null;
             end case;
diff --git a/src/vhdl/translate/translation.adb b/src/vhdl/translate/translation.adb
index 7bb16a17b..693212776 100644
--- a/src/vhdl/translate/translation.adb
+++ b/src/vhdl/translate/translation.adb
@@ -438,10 +438,8 @@ package body Translation is
       Ghdl_Real_Type := New_Float_Type;
       New_Type_Decl (Get_Identifier ("__ghdl_real"), Ghdl_Real_Type);
 
-      if not Flag_Only_32b then
-         Ghdl_I64_Type := New_Signed_Type (64);
-         New_Type_Decl (Get_Identifier ("__ghdl_i64"), Ghdl_I64_Type);
-      end if;
+      Ghdl_I64_Type := New_Signed_Type (64);
+      New_Type_Decl (Get_Identifier ("__ghdl_i64"), Ghdl_I64_Type);
 
       --  File index for elaborated file object.
       Ghdl_File_Index_Type := New_Unsigned_Type (32);
@@ -1226,10 +1224,8 @@ package body Translation is
       --  procedure __ghdl_image_p64 (res : std_string_ptr_node;
       --                              val : ghdl_i64_type;
       --                             rti : ghdl_rti_access);
-      if not Flag_Only_32b then
-         Create_Image_Value_Subprograms
-           ("p64", Ghdl_I64_Type, True, Ghdl_Image_P64, Ghdl_Value_P64);
-      end if;
+      Create_Image_Value_Subprograms
+        ("p64", Ghdl_I64_Type, True, Ghdl_Image_P64, Ghdl_Value_P64);
 
       --  procedure __ghdl_image_f64 (res : std_string_ptr_node;
       --                              val : ghdl_real_type);
@@ -1611,17 +1607,15 @@ package body Translation is
                                  Ghdl_Signal_Add_Port_Driver_F64,
                                  Ghdl_Signal_Driving_Value_F64);
 
-      if not Flag_Only_32b then
-         Create_Signal_Subprograms ("i64", Ghdl_I64_Type,
-                                    Ghdl_Create_Signal_I64,
-                                    Ghdl_Signal_Init_I64,
-                                    Ghdl_Signal_Simple_Assign_I64,
-                                    Ghdl_Signal_Start_Assign_I64,
-                                    Ghdl_Signal_Next_Assign_I64,
-                                    Ghdl_Signal_Associate_I64,
-                                    Ghdl_Signal_Add_Port_Driver_I64,
-                                    Ghdl_Signal_Driving_Value_I64);
-      end if;
+      Create_Signal_Subprograms ("i64", Ghdl_I64_Type,
+                                 Ghdl_Create_Signal_I64,
+                                 Ghdl_Signal_Init_I64,
+                                 Ghdl_Signal_Simple_Assign_I64,
+                                 Ghdl_Signal_Start_Assign_I64,
+                                 Ghdl_Signal_Next_Assign_I64,
+                                 Ghdl_Signal_Associate_I64,
+                                 Ghdl_Signal_Add_Port_Driver_I64,
+                                 Ghdl_Signal_Driving_Value_I64);
 
       --  procedure __ghdl_process_add_sensitivity (sig : __ghdl_signal_ptr);
       Start_Procedure_Decl
diff --git a/src/vhdl/translate/translation.ads b/src/vhdl/translate/translation.ads
index 73c92c347..91e8785e3 100644
--- a/src/vhdl/translate/translation.ads
+++ b/src/vhdl/translate/translation.ads
@@ -47,9 +47,6 @@ package Translation is
    --  If set, generate Run-Time Information nodes.
    Flag_Rti : Boolean := True;
 
-   --  If set, do not generate 64 bits integer types and operations.
-   Flag_Only_32b : Boolean := False;
-
    --  If set, do not generate code for unused subprograms.
    --  Be careful: unless you are in whole compilation mode, this
    --  flag shouldn't be set for packages and entities.