Rename In_Conversion/Out_Conversion to Actual_Conversion/Formal_Conversion.

4 files changed, 15 insertions, 15 deletions

diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb
index ba95730a1..1e7ad5fea 100644
--- a/src/vhdl/translate/trans-chap4.adb
+++ b/src/vhdl/translate/trans-chap4.adb
@@ -2643,14 +2643,14 @@ package body Trans.Chap4 is
             Push_Identifier_Prefix (Mark2, "CONVIN");
             Out_Type := Get_Type (Formal);
             In_Type := Get_Type (Actual);
-            Imp := Get_In_Conversion (Assoc);
+            Imp := Get_Actual_Conversion (Assoc);
 
          when Conv_Mode_Out =>
             --  OUT: from formal to actual.
             Push_Identifier_Prefix (Mark2, "CONVOUT");
             In_Type := Get_Type (Formal);
             Out_Type := Get_Type (Actual);
-            Imp := Get_Out_Conversion (Assoc);
+            Imp := Get_Formal_Conversion (Assoc);
 
       end case;
       --  FIXME: individual assoc -> overload.
@@ -2930,13 +2930,13 @@ package body Trans.Chap4 is
          if Get_Kind (Assoc) = Iir_Kind_Association_Element_By_Expression
          then
             Info := null;
-            if Get_In_Conversion (Assoc) /= Null_Iir then
+            if Get_Actual_Conversion (Assoc) /= Null_Iir then
                Info := Add_Info (Assoc, Kind_Assoc);
                Translate_Association_Subprogram
                  (Stmt, Block, Assoc, Inter, Conv_Mode_In, Info.Assoc_In,
                   Base_Block, Entity);
             end if;
-            if Get_Out_Conversion (Assoc) /= Null_Iir then
+            if Get_Formal_Conversion (Assoc) /= Null_Iir then
                if Info = null then
                   Info := Add_Info (Assoc, Kind_Assoc);
                end if;
@@ -3085,7 +3085,7 @@ package body Trans.Chap4 is
       Assoc_Info : constant Assoc_Info_Acc := Get_Info (Assoc);
    begin
       Elab_Conversion
-        (Get_Actual (Assoc), Formal, Get_In_Conversion (Assoc),
+        (Get_Actual (Assoc), Formal, Get_Actual_Conversion (Assoc),
          Ghdl_Signal_In_Conversion, Assoc_Info.Assoc_In, Ndest);
    end Elab_In_Conversion;
 
@@ -3097,7 +3097,7 @@ package body Trans.Chap4 is
       Assoc_Info : constant Assoc_Info_Acc := Get_Info (Assoc);
    begin
       Elab_Conversion
-        (Formal, Get_Actual (Assoc), Get_Out_Conversion (Assoc),
+        (Formal, Get_Actual (Assoc), Get_Formal_Conversion (Assoc),
          Ghdl_Signal_Out_Conversion, Assoc_Info.Assoc_Out, Ndest);
    end Elab_Out_Conversion;
 
diff --git a/src/vhdl/translate/trans-chap5.adb b/src/vhdl/translate/trans-chap5.adb
index ab0e696fa..ac054f394 100644
--- a/src/vhdl/translate/trans-chap5.adb
+++ b/src/vhdl/translate/trans-chap5.adb
@@ -378,8 +378,8 @@ package body Trans.Chap5 is
         (Get_Kind (Assoc) = Iir_Kind_Association_Element_By_Expression);
 
       Open_Temp;
-      if Get_In_Conversion (Assoc) = Null_Iir
-        and then Get_Out_Conversion (Assoc) = Null_Iir
+      if Get_Actual_Conversion (Assoc) = Null_Iir
+        and then Get_Formal_Conversion (Assoc) = Null_Iir
       then
          --  Usual case: without conversions.
          if Is_Signal_Name (Actual) then
@@ -476,7 +476,7 @@ package body Trans.Chap5 is
               (Formal_Sig, Formal_Type, Init_Node);
          end if;
       else
-         if Get_In_Conversion (Assoc) /= Null_Iir then
+         if Get_Actual_Conversion (Assoc) /= Null_Iir then
             Chap4.Elab_In_Conversion (Assoc, Formal, Actual_Sig);
             Set_Map_Env (Formal_Env);
             Formal_Sig := Chap6.Translate_Name (Formal, Mode_Signal);
@@ -487,7 +487,7 @@ package body Trans.Chap5 is
             Connect (Formal_Sig, Formal_Type, Data);
             Set_Map_Env (Actual_Env);
          end if;
-         if Get_Out_Conversion (Assoc) /= Null_Iir then
+         if Get_Formal_Conversion (Assoc) /= Null_Iir then
             --  flow: FORMAL to ACTUAL
             Chap4.Elab_Out_Conversion (Assoc, Formal, Formal_Sig);
             Set_Map_Env (Actual_Env);
@@ -526,8 +526,8 @@ package body Trans.Chap5 is
    is
       Actual : constant Iir := Get_Actual (Assoc);
       Actual_Type : constant Iir := Get_Type (Actual);
-      In_Conv : constant Iir := Get_In_Conversion (Assoc);
-      Out_Conv : constant Iir := Get_Out_Conversion (Assoc);
+      In_Conv : constant Iir := Get_Actual_Conversion (Assoc);
+      Out_Conv : constant Iir := Get_Formal_Conversion (Assoc);
 
       function Get_Actual_Bounds (Save : Boolean) return Mnode
       is
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb
index 29441bca8..2d74663e5 100644
--- a/src/vhdl/translate/trans-chap8.adb
+++ b/src/vhdl/translate/trans-chap8.adb
@@ -2665,7 +2665,7 @@ package body Trans.Chap8 is
                   In_Conv := Null_Iir;
                when Iir_Kind_Association_Element_By_Expression =>
                   Act := Get_Actual (El);
-                  In_Conv := Get_In_Conversion (El);
+                  In_Conv := Get_Actual_Conversion (El);
                when Iir_Kind_Association_Element_By_Individual =>
                   Actual_Type := Get_Actual_Type (El);
 
@@ -3216,7 +3216,7 @@ package body Trans.Chap8 is
                   end case;
                end if;
 
-               Out_Conv := Get_Out_Conversion (El);
+               Out_Conv := Get_Formal_Conversion (El);
                if Out_Conv = Null_Iir then
                   Out_Expr := Formal;
                   Val := M2E (Param);
diff --git a/src/vhdl/translate/trans-chap9.adb b/src/vhdl/translate/trans-chap9.adb
index 8f88ca0ee..2f001666e 100644
--- a/src/vhdl/translate/trans-chap9.adb
+++ b/src/vhdl/translate/trans-chap9.adb
@@ -200,7 +200,7 @@ package body Trans.Chap9 is
       while Assoc /= Null_Iir loop
          if Get_Kind (Assoc) = Iir_Kind_Association_Element_By_Expression
          then
-            Conv := Get_In_Conversion (Assoc);
+            Conv := Get_Actual_Conversion (Assoc);
             In_Type := Get_Type (Get_Actual (Assoc));
             if Conv /= Null_Iir
               and then Is_Anonymous_Type_Definition (In_Type)