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| author | Tristan Gingold <tgingold@free.fr> | 2014-12-13 07:34:11 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2014-12-13 07:34:11 +0100 |
| commit | 687d32b88144d65f153eea439cbf9ce763c2d5c5 (patch) | |
| tree | 2221af4f3cbcf0129744ebd7b63daf6abcf3900b /src/vhdl/translate/translation.adb | |
| parent | 13adc95751db357e2060b16fee2baaa818743b91 (diff) | |
| download | ghdl-687d32b88144d65f153eea439cbf9ce763c2d5c5.tar.gz ghdl-687d32b88144d65f153eea439cbf9ce763c2d5c5.tar.bz2 ghdl-687d32b88144d65f153eea439cbf9ce763c2d5c5.zip | |
rtis: add source location for blocks and object. Use them in fst dumper.
Diffstat (limited to 'src/vhdl/translate/translation.adb')
| -rw-r--r-- | src/vhdl/translate/translation.adb | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/vhdl/translate/translation.adb b/src/vhdl/translate/translation.adb index 2d89a62e1..b20f62218 100644 --- a/src/vhdl/translate/translation.adb +++ b/src/vhdl/translate/translation.adb @@ -199,9 +199,8 @@ package body Translation is is Info : Design_File_Info_Acc; begin - if Current_Filename_Node /= O_Dnode_Null then - raise Internal_Error; - end if; + pragma Assert (Current_Filename_Node = O_Dnode_Null); + Info := Get_Info (Design_File); if Info = null then Info := Add_Info (Design_File, Kind_Design_File); |