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authorTristan Gingold <tgingold@free.fr>2016-09-19 02:32:16 +0200
committerTristan Gingold <tgingold@free.fr>2016-09-19 02:32:16 +0200
commit8c6e8db93f3ef85f7edf242d83c3e7e9af194636 (patch)
treeeb353ac4ba18040935973d15801420b8c0fe953f /src/vhdl/translate/trans-chap7.adb
parent62652e356f2e91d2317f5305a03f972385ba7ca1 (diff)
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vhdl08: create interface subprogram declaration.
Diffstat (limited to 'src/vhdl/translate/trans-chap7.adb')
-rw-r--r--src/vhdl/translate/trans-chap7.adb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb
index c743cefa5..451dfcba6 100644
--- a/src/vhdl/translate/trans-chap7.adb
+++ b/src/vhdl/translate/trans-chap7.adb
@@ -5459,9 +5459,6 @@ package body Trans.Chap7 is
when Iir_Predefined_Error
| Iir_Predefined_Explicit =>
raise Internal_Error;
- when Iir_Predefined_Interface_Type_Equality
- | Iir_Predefined_Interface_Type_Inequality =>
- raise Internal_Error;
when Iir_Predefined_Boolean_And
| Iir_Predefined_Boolean_Or
| Iir_Predefined_Boolean_Xor