simul: check for no unconstrained port/generic of top-level entity.

2 files changed, 30 insertions, 1 deletions

diff --git a/src/vhdl/simulate/elaboration.adb b/src/vhdl/simulate/elaboration.adb
index 4289f24ff..1c3b66a80 100644
--- a/src/vhdl/simulate/elaboration.adb
+++ b/src/vhdl/simulate/elaboration.adb
@@ -2766,6 +2766,27 @@ package body Elaboration is
       end loop;
    end Override_Generics;
 
+   procedure Check_No_Unconstrained (Map : Iir)
+   is
+      Assoc : Iir;
+      Formal : Iir;
+   begin
+      Assoc := Map;
+      while Assoc /= Null_Iir loop
+         if Get_Kind (Assoc) = Iir_Kind_Association_Element_Open then
+            Formal := Get_Association_Interface (Assoc);
+            if Get_Default_Value (Formal) = Null_Iir
+              and then not Is_Fully_Constrained_Type (Get_Type (Formal))
+            then
+               Error_Msg_Elab
+                 ("top-level " & Disp_Node (Formal) & " must have a value",
+                  Formal);
+            end if;
+         end if;
+         Assoc := Get_Chain (Assoc);
+      end loop;
+   end Check_No_Unconstrained;
+
    -- Elaborate a design.
    procedure Elaborate_Design (Design: Iir_Design_Unit)
    is
@@ -2817,6 +2838,14 @@ package body Elaboration is
         (Get_Port_Chain (Entity), Null_Iir, Entity);
       Override_Generics (Generic_Map, Grt.Options.First_Generic_Override);
 
+      Check_No_Unconstrained (Generic_Map);
+      Check_No_Unconstrained (Port_Map);
+
+      --  Stop now in case of errors.
+      if Nbr_Errors /= 0 then
+         Grt.Errors.Fatal_Error;
+      end if;
+
       --  Elaborate from the top configuration.
       Conf := Get_Block_Configuration (Get_Library_Unit (Conf_Unit));
       Top_Instance := Elaborate_Architecture
diff --git a/src/vhdl/simulate/iir_values.adb b/src/vhdl/simulate/iir_values.adb
index 7ebcc6816..6723b2043 100644
--- a/src/vhdl/simulate/iir_values.adb
+++ b/src/vhdl/simulate/iir_values.adb
@@ -513,7 +513,7 @@ package body Iir_Values is
             end if;
          when Iir_Value_E8 =>
             if High.E8 >= Low.E8 then
-               Len := Iir_Index32 (High.E8 - Low.E8 + 1);
+               Len := Ghdl_E8'Pos (High.E8) - Ghdl_E8'Pos (Low.E8) + 1;
             else
                Len := 0;
             end if;