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| author | Tristan Gingold <tgingold@free.fr> | 2016-01-09 09:04:17 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2016-01-09 09:04:17 +0100 |
| commit | 9ccd655f0a727b7b1499870d577eea5da34ccbcd (patch) | |
| tree | f02970dcf1baead7d18cc5e1eff7d83da3798e06 /src/vhdl/simulate | |
| parent | 12ecf52980418a2af1f50072fc00e62b2ff1aa6f (diff) | |
| download | ghdl-9ccd655f0a727b7b1499870d577eea5da34ccbcd.tar.gz ghdl-9ccd655f0a727b7b1499870d577eea5da34ccbcd.tar.bz2 ghdl-9ccd655f0a727b7b1499870d577eea5da34ccbcd.zip | |
Reorder fields in signals for alignment.
Diffstat (limited to 'src/vhdl/simulate')
0 files changed, 0 insertions, 0 deletions