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author | Tristan Gingold <tgingold@free.fr> | 2017-12-04 04:19:13 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2017-12-04 04:19:13 +0100 |
commit | a3a8739ce5e5cf51e32366c8fbc6eb47ed562964 (patch) | |
tree | a387002c93042784f74c7bcf01de95de70b8e1e1 /src/vhdl/simulate/simul-execution.ads | |
parent | 58e18b1f9e734ddb101c53eb8195b5e2605ab8f6 (diff) | |
download | ghdl-a3a8739ce5e5cf51e32366c8fbc6eb47ed562964.tar.gz ghdl-a3a8739ce5e5cf51e32366c8fbc6eb47ed562964.tar.bz2 ghdl-a3a8739ce5e5cf51e32366c8fbc6eb47ed562964.zip |
simul: add support for case generate statetement.
Diffstat (limited to 'src/vhdl/simulate/simul-execution.ads')
-rw-r--r-- | src/vhdl/simulate/simul-execution.ads | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/vhdl/simulate/simul-execution.ads b/src/vhdl/simulate/simul-execution.ads index ac69ed8f5..8c05cee6d 100644 --- a/src/vhdl/simulate/simul-execution.ads +++ b/src/vhdl/simulate/simul-execution.ads @@ -125,6 +125,12 @@ package Simul.Execution is function Execute_Low_Limit (Bounds : Iir_Value_Literal_Acc) return Iir_Value_Literal_Acc; + -- Return True iff EXPR is covered by CHOICE. + function Is_In_Choice (Instance : Block_Instance_Acc; + Choice : Iir; + Expr : Iir_Value_Literal_Acc) + return Boolean; + function Get_Instance_By_Scope (Instance: Block_Instance_Acc; Scope: Sim_Info_Acc) return Block_Instance_Acc; |