vhdl: move iirs_utils to vhdl.utils

4 files changed, 5 insertions, 5 deletions

diff --git a/src/synth/synth-context.adb b/src/synth/synth-context.adb
index 95eb09baa..a84f56e38 100644
--- a/src/synth/synth-context.adb
+++ b/src/synth/synth-context.adb
@@ -23,7 +23,7 @@ with Ada.Unchecked_Deallocation;
 with Types; use Types;
 with Grt.Types; use Grt.Types;
 with Errorout; use Errorout;
-with Iirs_Utils;
+with Vhdl.Utils;
 
 with Vhdl.Std_Package;
 with Vhdl.Ieee.Std_Logic_1164;
@@ -97,7 +97,7 @@ package body Synth.Context is
                  (Kind, Obj, Bounds_To_Range (Val.Bounds.D (1)));
             end if;
             if Is_Bit_Type (Get_Element_Subtype (Btype))
-              and then Iirs_Utils.Get_Nbr_Dimensions (Btype) = 1
+              and then Vhdl.Utils.Get_Nbr_Dimensions (Btype) = 1
             then
                --  A vector of bits.
                return Alloc_Wire
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb
index 8453b58fa..613bcdbdd 100644
--- a/src/synth/synth-stmts.adb
+++ b/src/synth/synth-stmts.adb
@@ -26,7 +26,7 @@ with Areapools;
 with Errorout; use Errorout;
 
 with Vhdl.Sem_Expr;
-with Iirs_Utils; use Iirs_Utils;
+with Vhdl.Utils; use Vhdl.Utils;
 with Vhdl.Ieee.Std_Logic_1164;
 with Vhdl.Evaluation;
 
diff --git a/src/synth/synth-types.adb b/src/synth/synth-types.adb
index f1478fb18..19e9677ec 100644
--- a/src/synth/synth-types.adb
+++ b/src/synth/synth-types.adb
@@ -21,7 +21,7 @@
 with Types; use Types;
 with Vhdl.Std_Package;
 with Vhdl.Ieee.Std_Logic_1164;
-with Iirs_Utils; use Iirs_Utils;
+with Vhdl.Utils; use Vhdl.Utils;
 
 with Simul.Environments; use Simul.Environments;
 with Simul.Execution;
diff --git a/src/synth/synthesis.adb b/src/synth/synthesis.adb
index a32ce2fd2..770fb52c9 100644
--- a/src/synth/synthesis.adb
+++ b/src/synth/synthesis.adb
@@ -24,7 +24,7 @@ with Name_Table; use Name_Table;
 with Netlists.Builders; use Netlists.Builders;
 with Netlists.Utils;
 
-with Iirs_Utils; use Iirs_Utils;
+with Vhdl.Utils; use Vhdl.Utils;
 with Simul.Environments; use Simul.Environments;
 with Simul.Elaboration; use Simul.Elaboration;