elab: Rename Get/Set_Info to Get/Set_Ann

4 files changed, 59 insertions, 58 deletions

diff --git a/src/synth/elab-vhdl_annotations.adb b/src/synth/elab-vhdl_annotations.adb
index fcf7c8adb..0d7af8c79 100644
--- a/src/synth/elab-vhdl_annotations.adb
+++ b/src/synth/elab-vhdl_annotations.adb
@@ -100,7 +100,7 @@ package body Elab.Vhdl_Annotations is
            | Kind_Extra =>
             raise Internal_Error;
       end case;
-      Set_Info (Obj, Info);
+      Set_Ann (Obj, Info);
    end Create_Object_Info;
 
    -- Add an annotation to SIGNAL.
@@ -131,7 +131,7 @@ package body Elab.Vhdl_Annotations is
                                  Inst_Slot => Block_Info.Nbr_Objects,
                                  Nbr_Objects => 0,
                                  Nbr_Instances => 0);
-      Set_Info (Blk, Info);
+      Set_Ann (Blk, Info);
       return Info;
    end Create_Block_Info;
 
@@ -173,7 +173,7 @@ package body Elab.Vhdl_Annotations is
       Prot_Info := new Sim_Info_Type'(Kind => Kind_Protected,
                                       Ref => Prot,
                                       Nbr_Objects => 0);
-      Set_Info (Prot, Prot_Info);
+      Set_Ann (Prot, Prot_Info);
 
       Decl := Get_Declaration_Chain (Prot);
       while Decl /= Null_Iir loop
@@ -195,9 +195,9 @@ package body Elab.Vhdl_Annotations is
    is
       pragma Unreferenced (Block_Info);
       Prot_Info : constant Sim_Info_Acc :=
-        Get_Info (Get_Protected_Type_Declaration (Prot));
+        Get_Ann (Get_Protected_Type_Declaration (Prot));
    begin
-      Set_Info (Prot, Prot_Info);
+      Set_Ann (Prot, Prot_Info);
 
       Annotate_Declaration_List (Prot_Info, Get_Declaration_Chain (Prot));
    end Annotate_Protected_Type_Body;
@@ -230,7 +230,7 @@ package body Elab.Vhdl_Annotations is
                      then
                         null;
                         --  FIXME
-                        --  Convert_Int_To_Phys (Get_Info (El).Value);
+                        --  Convert_Int_To_Phys (Get_Ann (El).Value);
                      end if;
                   when Iir_Kind_Range_Array_Attribute
                     | Iir_Kind_Reverse_Range_Array_Attribute =>
@@ -353,7 +353,7 @@ package body Elab.Vhdl_Annotations is
          Nbr_Objects => 0,
          Pkg_Slot => Block_Info.Nbr_Objects,
          Pkg_Parent => Block_Info);
-      Set_Info (Inter, Package_Info);
+      Set_Ann (Inter, Package_Info);
 
       Annotate_Interface_List
         (Package_Info, Get_Generic_Chain (Inter), True);
@@ -424,7 +424,7 @@ package body Elab.Vhdl_Annotations is
       Subprg_Info := new Sim_Info_Type'(Kind => Kind_Frame,
                                         Ref => Subprg,
                                         Nbr_Objects => 0);
-      Set_Info (Subprg, Subprg_Info);
+      Set_Ann (Subprg, Subprg_Info);
 
       Annotate_Interface_List (Subprg_Info, Interfaces, False);
    end Annotate_Subprogram_Specification;
@@ -434,9 +434,9 @@ package body Elab.Vhdl_Annotations is
    is
       pragma Unreferenced (Block_Info);
       Spec : constant Iir := Get_Subprogram_Specification (Subprg);
-      Subprg_Info : constant Sim_Info_Acc := Get_Info (Spec);
+      Subprg_Info : constant Sim_Info_Acc := Get_Ann (Spec);
    begin
-      Set_Info (Subprg, Subprg_Info);
+      Set_Ann (Subprg, Subprg_Info);
 
       --  Do not annotate body of foreign subprograms.
       if Get_Foreign_Flag (Spec) then
@@ -460,7 +460,7 @@ package body Elab.Vhdl_Annotations is
                                  Inst_Slot => Invalid_Object_Slot,
                                  Nbr_Objects => 0,
                                  Nbr_Instances => 1); --  For the instance.
-      Set_Info (Comp, Info);
+      Set_Ann (Comp, Info);
 
       Annotate_Interface_List (Info, Get_Generic_Chain (Comp), True);
       Annotate_Interface_List (Info, Get_Port_Chain (Comp), True);
@@ -493,7 +493,7 @@ package body Elab.Vhdl_Annotations is
          Nbr_Objects => 0,
          Pkg_Slot => Invalid_Object_Slot,
          Pkg_Parent => null);
-      Set_Info (Decl, Package_Info);
+      Set_Ann (Decl, Package_Info);
 
       if Is_Inst or else not Is_Uninstantiated_Package (Decl) then
          --  Allocate a slot in the parent block.
@@ -522,14 +522,14 @@ package body Elab.Vhdl_Annotations is
             Bod : constant Iir := Get_Instance_Package_Body (Decl);
          begin
             if Bod /= Null_Iir then
-               Set_Info (Bod, Package_Info);
+               Set_Ann (Bod, Package_Info);
                Annotate_Declaration_List
                  (Package_Info, Get_Declaration_Chain (Bod));
             else
                declare
                   Uninst : constant Iir :=
                     Get_Uninstantiated_Package_Decl (Decl);
-                  Uninst_Info : constant Sim_Info_Acc := Get_Info (Uninst);
+                  Uninst_Info : constant Sim_Info_Acc := Get_Ann (Uninst);
                begin
                   --  There is not corresponding body for an instantiation, so
                   --  also add objects for the shared body.
@@ -545,7 +545,7 @@ package body Elab.Vhdl_Annotations is
    procedure Annotate_Package_Body (Bod: Iir)
    is
       Pkg : constant Node := Get_Package (Bod);
-      Package_Info : constant Sim_Info_Acc := Get_Info (Pkg);
+      Package_Info : constant Sim_Info_Acc := Get_Ann (Pkg);
    begin
       if Is_Uninstantiated_Package (Pkg)
         and then Get_Macro_Expanded_Flag (Pkg)
@@ -555,7 +555,7 @@ package body Elab.Vhdl_Annotations is
       end if;
 
       --  Set info field of package body declaration.
-      Set_Info (Bod, Package_Info);
+      Set_Ann (Bod, Package_Info);
 
       -- declarations
       Annotate_Declaration_List (Package_Info, Get_Declaration_Chain (Bod));
@@ -978,7 +978,7 @@ package body Elab.Vhdl_Annotations is
                                  Inst_Slot => Block_Info.Nbr_Objects,
                                  Nbr_Objects => 0,
                                  Nbr_Instances => 1);
-      Set_Info (Stmt, Info);
+      Set_Ann (Stmt, Info);
    end Annotate_Component_Instantiation_Statement;
 
    procedure Annotate_Process_Statement (Block_Info : Sim_Info_Acc; Stmt : Iir)
@@ -989,7 +989,7 @@ package body Elab.Vhdl_Annotations is
       Info := new Sim_Info_Type'(Kind => Kind_Process,
                                  Ref => Stmt,
                                  Nbr_Objects => 0);
-      Set_Info (Stmt, Info);
+      Set_Ann (Stmt, Info);
 
       Annotate_Declaration_List
         (Info, Get_Declaration_Chain (Stmt));
@@ -1051,7 +1051,7 @@ package body Elab.Vhdl_Annotations is
                Info := new Sim_Info_Type'(Kind => Kind_Process,
                                           Ref => Stmt,
                                           Nbr_Objects => 0);
-               Set_Info (Stmt, Info);
+               Set_Ann (Stmt, Info);
                Annotate_Procedure_Call_Statement (Info, Stmt);
             end;
 
@@ -1081,7 +1081,7 @@ package body Elab.Vhdl_Annotations is
                                         Inst_Slot => Invalid_Object_Slot,
                                         Nbr_Objects => 0,
                                         Nbr_Instances => 0);
-      Set_Info (Decl, Entity_Info);
+      Set_Ann (Decl, Entity_Info);
 
       Annotate_Interface_List (Entity_Info, Get_Generic_Chain (Decl), True);
       Annotate_Interface_List (Entity_Info, Get_Port_Chain (Decl), True);
@@ -1093,7 +1093,7 @@ package body Elab.Vhdl_Annotations is
 
    procedure Annotate_Architecture (Decl: Iir_Architecture_Body)
    is
-      Entity_Info : constant Sim_Info_Acc := Get_Info (Get_Entity (Decl));
+      Entity_Info : constant Sim_Info_Acc := Get_Ann (Get_Entity (Decl));
       Saved_Info : constant Sim_Info_Type (Kind_Block) := Entity_Info.all;
       Arch_Info: Sim_Info_Acc;
    begin
@@ -1109,7 +1109,7 @@ package body Elab.Vhdl_Annotations is
 
       Arch_Info := new Sim_Info_Type'(Entity_Info.all);
       Entity_Info.all := Saved_Info;
-      Set_Info (Decl, Arch_Info);
+      Set_Ann (Decl, Arch_Info);
    end Annotate_Architecture;
 
    procedure Annotate_Vunit_Declaration (Decl : Iir)
@@ -1122,7 +1122,7 @@ package body Elab.Vhdl_Annotations is
                                        Inst_Slot => Invalid_Object_Slot,
                                        Nbr_Objects => 0,
                                        Nbr_Instances => 0);
-      Set_Info (Decl, Vunit_Info);
+      Set_Ann (Decl, Vunit_Info);
 
       Item := Get_Vunit_Item_Chain (Decl);
       while Item /= Null_Iir loop
@@ -1173,7 +1173,7 @@ package body Elab.Vhdl_Annotations is
                                  Inst_Slot => Invalid_Object_Slot,
                                  Nbr_Objects => 0,
                                  Nbr_Instances => 0);
-      Set_Info (Decl, Info);
+      Set_Ann (Decl, Info);
 
       Annotate_Interface_List (Info, Get_Generic_Chain (Decl), True);
       Annotate_Interface_List (Info, Get_Port_Chain (Decl), True);
@@ -1222,7 +1222,7 @@ package body Elab.Vhdl_Annotations is
          Nbr_Objects => 0,
          Pkg_Slot => Block_Info.Nbr_Objects,
          Pkg_Parent => Block_Info);
-      Set_Info (Decl, Config_Info);
+      Set_Ann (Decl, Config_Info);
 
       Annotate_Declaration_List (Config_Info, Get_Declaration_Chain (Decl));
       Annotate_Block_Configuration (Get_Block_Configuration (Decl));
@@ -1274,9 +1274,9 @@ package body Elab.Vhdl_Annotations is
                   Annotate_Package_Declaration (Global_Info, El);
                   --  These types are not in std.standard!
                   Annotate_Type_Definition
-                    (Get_Info (El), Convertible_Integer_Type_Definition);
+                    (Get_Ann (El), Convertible_Integer_Type_Definition);
                   Annotate_Type_Definition
-                    (Get_Info (El), Convertible_Real_Type_Definition);
+                    (Get_Ann (El), Convertible_Real_Type_Definition);
                else
                   pragma Assert (Global_Info /= null);
                   Annotate_Package_Declaration (Global_Info, El);
@@ -1329,7 +1329,7 @@ package body Elab.Vhdl_Annotations is
    procedure Disp_Vhdl_Info (Node: Iir)
    is
       use Simple_IO;
-      Info : constant Sim_Info_Acc := Get_Info (Node);
+      Info : constant Sim_Info_Acc := Get_Ann (Node);
    begin
       if Info = null then
          return;
@@ -1393,17 +1393,17 @@ package body Elab.Vhdl_Annotations is
 
    procedure Disp_Tree_Info (Node: Iir) is
    begin
-      Disp_Info (Get_Info (Node));
+      Disp_Info (Get_Ann (Node));
    end Disp_Tree_Info;
 
-   procedure Set_Info (Target: Iir; Info: Sim_Info_Acc) is
+   procedure Set_Ann (Target: Iir; Info: Sim_Info_Acc) is
    begin
       pragma Assert (Info_Node.Table (Target) = null);
       Info_Node.Table (Target) := Info;
-   end Set_Info;
+   end Set_Ann;
 
-   function Get_Info (Target: Iir) return Sim_Info_Acc is
+   function Get_Ann (Target: Iir) return Sim_Info_Acc is
    begin
       return Info_Node.Table (Target);
-   end Get_Info;
+   end Get_Ann;
 end Elab.Vhdl_Annotations;
diff --git a/src/synth/elab-vhdl_annotations.ads b/src/synth/elab-vhdl_annotations.ads
index b8888adf0..3e48dbf0a 100644
--- a/src/synth/elab-vhdl_annotations.ads
+++ b/src/synth/elab-vhdl_annotations.ads
@@ -107,16 +107,17 @@ package Elab.Vhdl_Annotations is
    procedure Disp_Vhdl_Info (Node : Iir);
    procedure Disp_Tree_Info (Node : Iir);
 
+   --  Infos for top-level packages.
    Global_Info : Sim_Info_Acc;
 
    -- Annotations are used to collect informations for elaboration and to
    -- locate iir_value_literal for signals, variables or constants.
 
    -- Get/Set annotation fied from/to an iir.
-   procedure Set_Info (Target : Iir; Info : Sim_Info_Acc);
-   pragma Inline (Set_Info);
-   function Get_Info (Target : Iir) return Sim_Info_Acc;
-   pragma Inline (Get_Info);
+   procedure Set_Ann (Target : Iir; Info : Sim_Info_Acc);
+   pragma Inline (Set_Ann);
+   function Get_Ann (Target : Iir) return Sim_Info_Acc;
+   pragma Inline (Get_Ann);
 
    --  Expand the annotation table.  This is automatically done by Annotate,
    --  to be used only by debugger.
diff --git a/src/synth/elab-vhdl_context.adb b/src/synth/elab-vhdl_context.adb
index cfc41aacc..99f3efb1d 100644
--- a/src/synth/elab-vhdl_context.adb
+++ b/src/synth/elab-vhdl_context.adb
@@ -82,7 +82,7 @@ package body Elab.Vhdl_Context is
                                 Config : Node)
      return Synth_Instance_Acc
    is
-      Info : constant Sim_Info_Acc := Get_Info (Blk);
+      Info : constant Sim_Info_Acc := Get_Ann (Blk);
       Scope : constant Sim_Info_Acc := Get_Info_Scope (Blk);
       Nbr_Objs : Object_Slot_Type;
       Res : Synth_Instance_Acc;
@@ -135,7 +135,7 @@ package body Elab.Vhdl_Context is
      (Parent : Synth_Instance_Acc; Blk : Node; Config : Node; Len : Natural)
      return Synth_Instance_Acc
    is
-      Info : constant Sim_Info_Acc := Get_Info (Blk);
+      Info : constant Sim_Info_Acc := Get_Ann (Blk);
       Res : Synth_Instance_Acc;
    begin
       Res := new Synth_Instance_Type'(Max_Objs => Object_Slot_Type (Len),
@@ -305,7 +305,7 @@ package body Elab.Vhdl_Context is
    procedure Create_Object_Force
      (Syn_Inst : Synth_Instance_Acc; Decl : Node; Vt : Valtyp)
    is
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
    begin
       pragma Assert
         (Syn_Inst.Objects (Info.Slot).Kind = Obj_None
@@ -319,7 +319,7 @@ package body Elab.Vhdl_Context is
      (Syn_Inst : Synth_Instance_Acc; N : Node; Pool : Areapools.Areapool_Acc)
    is
       use Areapools;
-      Info : constant Sim_Info_Acc := Get_Info (N);
+      Info : constant Sim_Info_Acc := Get_Ann (N);
    begin
       Create_Object (Syn_Inst, Info.Slot, 1);
       Syn_Inst.Objects (Info.Slot) := (Kind => Obj_Marker,
@@ -330,7 +330,7 @@ package body Elab.Vhdl_Context is
    procedure Create_Object
      (Syn_Inst : Synth_Instance_Acc; Decl : Node; Vt : Valtyp)
    is
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
    begin
       Create_Object (Syn_Inst, Info.Slot, 1);
       Create_Object_Force (Syn_Inst, Decl, Vt);
@@ -341,7 +341,7 @@ package body Elab.Vhdl_Context is
                             Typ : Type_Acc;
                             Init : Value_Acc)
    is
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
       Vt : Valtyp;
    begin
       Create_Object (Syn_Inst, Info.Slot, 1);
@@ -353,7 +353,7 @@ package body Elab.Vhdl_Context is
    procedure Replace_Signal
      (Syn_Inst : Synth_Instance_Acc; Decl : Node; Vt : Valtyp)
    is
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
       Obj : Obj_Type renames Syn_Inst.Objects (Info.Slot);
    begin
       pragma Assert (Obj.Kind = Obj_Object);
@@ -368,7 +368,7 @@ package body Elab.Vhdl_Context is
    procedure Mutate_Object
      (Syn_Inst : Synth_Instance_Acc; Decl : Node; Vt : Valtyp)
    is
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
       Obj : Obj_Type renames Syn_Inst.Objects (Info.Slot);
    begin
       pragma Assert (Obj.Kind = Obj_Object);
@@ -381,7 +381,7 @@ package body Elab.Vhdl_Context is
                                   Stmt : Node;
                                   Sub_Inst : Synth_Instance_Acc)
    is
-      Info : constant Sim_Info_Acc := Get_Info (Stmt);
+      Info : constant Sim_Info_Acc := Get_Ann (Stmt);
    begin
       Create_Object (Syn_Inst, Info.Inst_Slot, 1);
       pragma Assert (Syn_Inst.Objects (Info.Inst_Slot).Kind = Obj_None);
@@ -405,7 +405,7 @@ package body Elab.Vhdl_Context is
      (Syn_Inst : Synth_Instance_Acc; Decl : Node; Typ : Type_Acc)
    is
       pragma Assert (Typ /= null);
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
    begin
       Create_Object (Syn_Inst, Info.Slot, 1);
       pragma Assert (Syn_Inst.Objects (Info.Slot).Kind = Obj_None);
@@ -417,7 +417,7 @@ package body Elab.Vhdl_Context is
                                     Inst : Synth_Instance_Acc;
                                     Is_Global : Boolean)
    is
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
    begin
       if Is_Global then
          pragma Assert (Syn_Inst.Objects (Info.Pkg_Slot).Kind = Obj_None);
@@ -435,7 +435,7 @@ package body Elab.Vhdl_Context is
                                        Decl     : Node;
                                        Inst     : Synth_Instance_Acc)
    is
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
    begin
       pragma Assert (Syn_Inst.Up_Block /= null);
       Create_Object (Syn_Inst, Info.Pkg_Slot, 1);
@@ -456,7 +456,7 @@ package body Elab.Vhdl_Context is
    function Get_Package_Object
      (Syn_Inst : Synth_Instance_Acc; Pkg : Node) return Synth_Instance_Acc is
    begin
-      return Get_Package_Object (Syn_Inst, Get_Info (Pkg));
+      return Get_Package_Object (Syn_Inst, Get_Ann (Pkg));
    end Get_Package_Object;
 
    function Create_Package_Instance (Parent_Inst : Synth_Instance_Acc;
@@ -479,7 +479,7 @@ package body Elab.Vhdl_Context is
    function Get_Sub_Instance
      (Syn_Inst : Synth_Instance_Acc; Stmt : Node) return Synth_Instance_Acc
    is
-      Info : constant Sim_Info_Acc := Get_Info (Stmt);
+      Info : constant Sim_Info_Acc := Get_Ann (Stmt);
    begin
       return Syn_Inst.Objects (Info.Inst_Slot).I_Inst;
    end Get_Sub_Instance;
@@ -495,7 +495,7 @@ package body Elab.Vhdl_Context is
    procedure Set_Uninstantiated_Scope
      (Syn_Inst : Synth_Instance_Acc; Bod : Node) is
    begin
-      Syn_Inst.Uninst_Scope := Get_Info (Bod);
+      Syn_Inst.Uninst_Scope := Get_Ann (Bod);
    end Set_Uninstantiated_Scope;
 
    procedure Destroy_Init (D : out Destroy_Type;
@@ -529,7 +529,7 @@ package body Elab.Vhdl_Context is
 
    procedure Destroy_Object (D : in out Destroy_Type; Decl : Node)
    is
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
    begin
       Destroy_Check (D, Info);
       D.Inst.Objects (Info.Slot) := (Kind => Obj_None);
@@ -539,7 +539,7 @@ package body Elab.Vhdl_Context is
      (D : in out Destroy_Type; N : Node; Pool : Areapools.Areapool_Acc)
    is
       use Areapools;
-      Info : constant Sim_Info_Acc := Get_Info (N);
+      Info : constant Sim_Info_Acc := Get_Ann (N);
       Slot : constant Object_Slot_Type := Info.Slot;
    begin
       Destroy_Check (D, Info);
@@ -627,7 +627,7 @@ package body Elab.Vhdl_Context is
       else
          N := Blk;
       end if;
-      return Get_Info (N);
+      return Get_Ann (N);
    end Get_Info_Scope;
 
    function Get_Parent_Scope (Blk : Node) return Sim_Info_Acc is
@@ -638,7 +638,7 @@ package body Elab.Vhdl_Context is
    function Get_Value (Syn_Inst: Synth_Instance_Acc; Obj : Node)
                       return Valtyp
    is
-      Info : constant Sim_Info_Acc := Get_Info (Obj);
+      Info : constant Sim_Info_Acc := Get_Ann (Obj);
       Obj_Inst : Synth_Instance_Acc;
    begin
       Obj_Inst := Get_Instance_By_Scope (Syn_Inst, Info.Obj_Scope);
@@ -648,7 +648,7 @@ package body Elab.Vhdl_Context is
    function Get_Subtype_Object
      (Syn_Inst : Synth_Instance_Acc; Decl : Node) return Type_Acc
    is
-      Info : constant Sim_Info_Acc := Get_Info (Decl);
+      Info : constant Sim_Info_Acc := Get_Ann (Decl);
       Obj_Inst : Synth_Instance_Acc;
    begin
       Obj_Inst := Get_Instance_By_Scope (Syn_Inst, Info.Obj_Scope);
diff --git a/src/synth/synth-vhdl_expr.adb b/src/synth/synth-vhdl_expr.adb
index c4bd18868..d194c4dcd 100644
--- a/src/synth/synth-vhdl_expr.adb
+++ b/src/synth/synth-vhdl_expr.adb
@@ -474,7 +474,7 @@ package body Synth.Vhdl_Expr is
                                 Dim : Dim_Type) return Bound_Type
    is
       use Elab.Vhdl_Annotations;
-      Info : constant Sim_Info_Acc := Get_Info (Atype);
+      Info : constant Sim_Info_Acc := Get_Ann (Atype);
    begin
       if Info = null then
          pragma Assert (Get_Type_Declarator (Atype) = Null_Node);