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authorTristan Gingold <tgingold@free.fr>2020-02-05 20:15:10 +0100
committerTristan Gingold <tgingold@free.fr>2020-02-05 20:15:10 +0100
commit526a215d252c74702b774385c3c55cb8986fc344 (patch)
tree88595382fc8b8c81d4e2cbef674e9cdfe2273401 /src/synth
parent76e2f6b335b8fbc5c44b5b166653b096f8c3ee57 (diff)
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netlists-disp_vhdl: handle 1-bit const_x. For #1107
Diffstat (limited to 'src/synth')
-rw-r--r--src/synth/netlists-disp_vhdl.adb12
1 files changed, 9 insertions, 3 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb
index 94c5398b3..f629fd21a 100644
--- a/src/synth/netlists-disp_vhdl.adb
+++ b/src/synth/netlists-disp_vhdl.adb
@@ -334,6 +334,7 @@ package body Netlists.Disp_Vhdl is
is
Imod : constant Module := Get_Module (Inst);
O : constant Net := Get_Output (Inst, 0);
+ W : Width;
begin
case Get_Id (Imod) is
when Id_Const_UB32
@@ -348,9 +349,14 @@ package body Netlists.Disp_Vhdl is
Put_Uns32 (Get_Width (O) - 1);
Put (" downto 0 => 'Z')");
when Id_Const_X =>
- Put ('(');
- Put_Uns32 (Get_Width (O) - 1);
- Put (" downto 0 => 'X')");
+ W := Get_Width (O);
+ if W = 1 then
+ Put ("'X'");
+ else
+ Put ('(');
+ Put_Uns32 (Get_Width (O) - 1);
+ Put (" downto 0 => 'X')");
+ end if;
when Id_Const_Bit =>
Disp_Const_Bit (Inst);
when Id_Const_Log =>