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author | Tristan Gingold <tgingold@free.fr> | 2022-09-25 15:38:27 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-09-25 15:38:27 +0200 |
commit | 476236deae896de421daab68890e2e2473caf13d (patch) | |
tree | dbde82f11821754b9d70b540d6c02ef50559746f /src/synth | |
parent | 551fe31c9a9331998199369f903ede9c3cb4a79c (diff) | |
download | ghdl-476236deae896de421daab68890e2e2473caf13d.tar.gz ghdl-476236deae896de421daab68890e2e2473caf13d.tar.bz2 ghdl-476236deae896de421daab68890e2e2473caf13d.zip |
synth: improve error checks (type conversion, string literals)
Diffstat (limited to 'src/synth')
-rw-r--r-- | src/synth/elab-vhdl_expr.adb | 10 | ||||
-rw-r--r-- | src/synth/synth-vhdl_decls.adb | 4 | ||||
-rw-r--r-- | src/synth/synth-vhdl_expr.adb | 56 |
3 files changed, 37 insertions, 33 deletions
diff --git a/src/synth/elab-vhdl_expr.adb b/src/synth/elab-vhdl_expr.adb index d6a2f6618..15e14417d 100644 --- a/src/synth/elab-vhdl_expr.adb +++ b/src/synth/elab-vhdl_expr.adb @@ -33,6 +33,7 @@ with Elab.Vhdl_Errors; use Elab.Vhdl_Errors; with Synth.Vhdl_Expr; use Synth.Vhdl_Expr; with Synth.Vhdl_Eval; use Synth.Vhdl_Eval; +with Synth.Errors; use Synth.Errors; with Grt.Types; with Grt.To_Strings; @@ -424,9 +425,9 @@ package body Elab.Vhdl_Expr is Str : Node; Str_Typ : Type_Acc) return Valtyp is - pragma Unreferenced (Syn_Inst); pragma Assert (Get_Kind (Str) = Iir_Kind_String_Literal8); Id : constant String8_Id := Get_String8_Id (Str); + Len : constant Int32 := Get_String_Length (Str); Str_Type : constant Node := Get_Type (Str); El_Type : Type_Acc; @@ -439,10 +440,15 @@ package body Elab.Vhdl_Expr is when Type_Vector | Type_Array => Bounds := Str_Typ.Abound; + if Bounds.Len /= Uns32 (Len) then + Error_Msg_Synth + (Syn_Inst, Str, "string length doesn't match constraints"); + return No_Valtyp; + end if; when Type_Unbounded_Vector | Type_Unbounded_Array => Bounds := Synth_Bounds_From_Length - (Get_Index_Type (Str_Type, 0), Get_String_Length (Str)); + (Get_Index_Type (Str_Type, 0), Len); when others => raise Internal_Error; end case; diff --git a/src/synth/synth-vhdl_decls.adb b/src/synth/synth-vhdl_decls.adb index c5611f014..f9618462e 100644 --- a/src/synth/synth-vhdl_decls.adb +++ b/src/synth/synth-vhdl_decls.adb @@ -177,12 +177,14 @@ package body Synth.Vhdl_Decls is end if; Val := Synth_Expression_With_Type (Syn_Inst, Get_Default_Value (Decl), Obj_Type); + if Val /= No_Valtyp then + Val := Synth_Subtype_Conversion (Syn_Inst, Val, Obj_Type, True, Decl); + end if; if Val = No_Valtyp then Set_Error (Syn_Inst); Release_Expr_Pool (Marker); return; end if; - Val := Synth_Subtype_Conversion (Syn_Inst, Val, Obj_Type, True, Decl); -- For constant functions, the value must be constant. pragma Assert (not Get_Instance_Const (Syn_Inst) or else Is_Static (Val.Val)); diff --git a/src/synth/synth-vhdl_expr.adb b/src/synth/synth-vhdl_expr.adb index 613f0406c..204a28f04 100644 --- a/src/synth/synth-vhdl_expr.adb +++ b/src/synth/synth-vhdl_expr.adb @@ -1187,34 +1187,25 @@ package body Synth.Vhdl_Expr is Off := (0, 0); Inp := No_Net; - case Get_Kind (Expr) is - when Iir_Kind_Range_Expression => - -- As the range may be dynamic, cannot use synth_discrete_range. - Left := Synth_Expression_With_Basetype - (Syn_Inst, Get_Left_Limit (Expr)); - Right := Synth_Expression_With_Basetype - (Syn_Inst, Get_Right_Limit (Expr)); - Dir := Get_Direction (Expr); - - when Iir_Kind_Range_Array_Attribute - | Iir_Kind_Reverse_Range_Array_Attribute - | Iir_Kinds_Denoting_Name => - declare - Rng : Discrete_Range_Type; - begin - Synth_Discrete_Range (Syn_Inst, Expr, Rng); - Synth_Slice_Const_Suffix (Syn_Inst, Expr, - Name, Pfx_Bnd, - Rng.Left, Rng.Right, Rng.Dir, - El_Typ, Res_Bnd, Off); - return; - end; - when others => - Error_Msg_Synth - (Syn_Inst, Expr, "only range expression supported for slices"); - Res_Bnd := (Dir => Dir_To, Left => 1, Right => 0, Len => 0); + if Get_Kind (Expr) = Iir_Kind_Range_Expression then + -- As the range may be dynamic, cannot use synth_discrete_range. + Left := Synth_Expression_With_Basetype + (Syn_Inst, Get_Left_Limit (Expr)); + Right := Synth_Expression_With_Basetype + (Syn_Inst, Get_Right_Limit (Expr)); + Dir := Get_Direction (Expr); + else + declare + Rng : Discrete_Range_Type; + begin + Synth_Discrete_Range (Syn_Inst, Expr, Rng); + Synth_Slice_Const_Suffix (Syn_Inst, Expr, + Name, Pfx_Bnd, + Rng.Left, Rng.Right, Rng.Dir, + El_Typ, Res_Bnd, Off); return; - end case; + end; + end if; if Is_Static_Val (Left.Val) and then Is_Static_Val (Right.Val) then Synth_Slice_Const_Suffix (Syn_Inst, Expr, @@ -1395,13 +1386,17 @@ package body Synth.Vhdl_Expr is function Synth_Type_Conversion (Syn_Inst : Synth_Instance_Acc; Val : Valtyp; Conv_Typ : Type_Acc; - Loc : Node) return Valtyp is + Loc : Node) return Valtyp + is + Res : Valtyp; begin case Conv_Typ.Kind is when Type_Discrete => if Val.Typ.Kind = Type_Discrete then -- Int to int. - return Val; + Res := Synth_Subtype_Conversion + (Syn_Inst, Val, Conv_Typ, False, Loc); + return Res; elsif Val.Typ.Kind = Type_Float then pragma Assert (Is_Static (Val.Val)); declare @@ -1429,8 +1424,9 @@ package body Synth.Vhdl_Expr is end if; when Type_Float => if Is_Static (Val.Val) then - return Create_Value_Float + Res := Create_Value_Float (Fp64 (Read_Discrete (Val)), Conv_Typ); + return Res; else Error_Msg_Synth (Syn_Inst, Loc, "unhandled type conversion (to float)"); |