synth: refactoring (synth.aggr -> synth.vhdl_aggr)

3 files changed, 7 insertions, 7 deletions

diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb
index 15b9914f0..437318257 100644
--- a/src/synth/synth-expr.adb
+++ b/src/synth/synth-expr.adb
@@ -46,7 +46,7 @@ with Synth.Stmts; use Synth.Stmts;
 with Synth.Oper; use Synth.Oper;
 with Synth.Heap; use Synth.Heap;
 with Synth.Debugger;
-with Synth.Aggr;
+with Synth.Vhdl_Aggr;
 
 with Grt.Types;
 with Grt.To_Strings;
@@ -2395,7 +2395,7 @@ package body Synth.Expr is
                end case;
             end;
          when Iir_Kind_Aggregate =>
-            return Synth.Aggr.Synth_Aggregate (Syn_Inst, Expr, Expr_Type);
+            return Synth.Vhdl_Aggr.Synth_Aggregate (Syn_Inst, Expr, Expr_Type);
          when Iir_Kind_Simple_Aggregate =>
             return Synth_Simple_Aggregate (Syn_Inst, Expr);
          when Iir_Kind_Parenthesis_Expression =>
diff --git a/src/synth/synth-aggr.adb b/src/synth/synth-vhdl_aggr.adb
index 0df9ae9c6..6863924f0 100644
--- a/src/synth/synth-aggr.adb
+++ b/src/synth/synth-vhdl_aggr.adb
@@ -31,7 +31,7 @@ with Synth.Expr; use Synth.Expr;
 with Synth.Stmts; use Synth.Stmts;
 with Synth.Decls; use Synth.Decls;
 
-package body Synth.Aggr is
+package body Synth.Vhdl_Aggr is
    type Stride_Array is array (Dim_Type range <>) of Nat32;
 
    procedure Get_Index_Offset (Index : Int64;
@@ -519,7 +519,7 @@ package body Synth.Aggr is
             declare
                Res_Type : Type_Acc;
             begin
-               Res_Type := Decls.Synth_Array_Subtype_Indication
+               Res_Type := Synth_Array_Subtype_Indication
                  (Syn_Inst, Get_Type (Aggr));
                return Synth_Aggregate_Array (Syn_Inst, Aggr, Res_Type);
             end;
@@ -534,4 +534,4 @@ package body Synth.Aggr is
       end case;
    end Synth_Aggregate;
 
-end Synth.Aggr;
+end Synth.Vhdl_Aggr;
diff --git a/src/synth/synth-aggr.ads b/src/synth/synth-vhdl_aggr.ads
index d37cd8afe..822c0705d 100644
--- a/src/synth/synth-aggr.ads
+++ b/src/synth/synth-vhdl_aggr.ads
@@ -22,9 +22,9 @@ with Synth.Objtypes; use Synth.Objtypes;
 with Synth.Values; use Synth.Values;
 with Synth.Vhdl_Context; use Synth.Vhdl_Context;
 
-package Synth.Aggr is
+package Synth.Vhdl_Aggr is
    --  Aggr_Type is the type from the context.
    function Synth_Aggregate (Syn_Inst : Synth_Instance_Acc;
                              Aggr : Node;
                              Aggr_Type : Type_Acc) return Valtyp;
-end Synth.Aggr;
+end Synth.Vhdl_Aggr;