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authorTristan Gingold <tgingold@free.fr>2019-10-06 21:22:35 +0200
committerTristan Gingold <tgingold@free.fr>2019-10-06 21:22:35 +0200
commit28a691dc5ca293b1b9d6b02b2b76ce8d0b7231d0 (patch)
tree80c0a6f186e5804c84b7d8f2d650a7ce02ca49e6 /src/synth
parentcddbaa9cbaf33428bb2dc59de00f9f89f8bcd585 (diff)
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synth: propagate assignments out of subprograms. Fix #960
Diffstat (limited to 'src/synth')
-rw-r--r--src/synth/synth-environment.adb27
-rw-r--r--src/synth/synth-environment.ads7
-rw-r--r--src/synth/synth-stmts.adb11
3 files changed, 43 insertions, 2 deletions
diff --git a/src/synth/synth-environment.adb b/src/synth/synth-environment.adb
index 2785d9b08..d082f3885 100644
--- a/src/synth/synth-environment.adb
+++ b/src/synth/synth-environment.adb
@@ -317,6 +317,33 @@ package body Synth.Environment is
-- FIXME: free wires.
end Pop_And_Merge_Phi;
+ procedure Propagate_Phi_Until_Mark (Ctxt : Builders.Context_Acc;
+ Phi : Phi_Type;
+ Mark : Wire_Id)
+ is
+ Asgn : Seq_Assign;
+ begin
+ Asgn := Phi.First;
+ while Asgn /= No_Seq_Assign loop
+ declare
+ Asgn_Rec : Seq_Assign_Record renames Assign_Table.Table (Asgn);
+ Wid : constant Wire_Id := Asgn_Rec.Id;
+ Pasgn, Next_Pasgn : Partial_Assign;
+ begin
+ if Wid <= Mark then
+ Pasgn := Asgn_Rec.Asgns;
+ while Pasgn /= No_Partial_Assign loop
+ Next_Pasgn := Get_Partial_Next (Pasgn);
+ Set_Partial_Next (Pasgn, No_Partial_Assign);
+ Phi_Assign (Ctxt, Wid, Pasgn);
+ Pasgn := Next_Pasgn;
+ end loop;
+ end if;
+ Asgn := Asgn_Rec.Chain;
+ end;
+ end loop;
+ end Propagate_Phi_Until_Mark;
+
-- Merge sort of conc_assign by offset.
function Le_Conc_Assign (Left, Right : Conc_Assign) return Boolean is
begin
diff --git a/src/synth/synth-environment.ads b/src/synth/synth-environment.ads
index 5c1d9fdbe..7b9215128 100644
--- a/src/synth/synth-environment.ads
+++ b/src/synth/synth-environment.ads
@@ -118,6 +118,13 @@ package Synth.Environment is
procedure Pop_And_Merge_Phi (Ctxt : Builders.Context_Acc;
Stmt : Source.Syn_Src);
+ -- All assignments in PHI to wires below MARK are propagated to the
+ -- current phi. Used to propagate assignments to wires defined out of
+ -- a subprogram when leaving a subprogram.
+ procedure Propagate_Phi_Until_Mark (Ctxt : Builders.Context_Acc;
+ Phi : Phi_Type;
+ Mark : Wire_Id);
+
-- Handle if statement. According to SEL, the value of the wires are
-- those from T or from F.
procedure Merge_Phis (Ctxt : Builders.Context_Acc;
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb
index 32dfd8631..8b1fc0645 100644
--- a/src/synth/synth-stmts.adb
+++ b/src/synth/synth-stmts.adb
@@ -1270,6 +1270,7 @@ package body Synth.Stmts is
end;
end case;
+ -- FIXME: conversion only for constants, reshape for all.
Val := Synth_Subtype_Conversion (Val, Inter_Type, True, Assoc);
if Get_Instance_Const (Subprg_Inst) and then not Is_Const (Val) then
@@ -1331,8 +1332,11 @@ package body Synth.Stmts is
null;
when Iir_Out_Mode | Iir_Inout_Mode =>
Nbr_Inout := Nbr_Inout + 1;
- Val := Synth_Expression (Subprg_Inst, Inter);
- Synth_Assignment (Caller_Inst, Infos (Nbr_Inout), Val, Assoc);
+ if False then
+ Val := Synth_Expression (Subprg_Inst, Inter);
+ Synth_Assignment
+ (Caller_Inst, Infos (Nbr_Inout), Val, Assoc);
+ end if;
end case;
Next_Association_Interface (Assoc, Assoc_Inter);
@@ -1464,6 +1468,9 @@ package body Synth.Stmts is
Decls.Finalize_Declarations
(C.Inst, Get_Declaration_Chain (Bod), True);
pragma Unreferenced (Infos);
+
+ -- Propagate assignments.
+ Propagate_Phi_Until_Mark (Get_Build (C.Inst), Subprg_Phi, Wire_Mark);
end;
-- Free wires.