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author | Tristan Gingold <tgingold@free.fr> | 2023-03-05 09:23:52 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2023-03-05 09:24:48 +0100 |
commit | 184901af3e93ff1388f18e1f22bf26edb6df1159 (patch) | |
tree | aced3dc5b931452ae30fe536c0d091881f4cc4de /src/synth | |
parent | 0d2363dc400eebbbdb06cd93a2ae87e4bfaaf1e8 (diff) | |
download | ghdl-184901af3e93ff1388f18e1f22bf26edb6df1159.tar.gz ghdl-184901af3e93ff1388f18e1f22bf26edb6df1159.tar.bz2 ghdl-184901af3e93ff1388f18e1f22bf26edb6df1159.zip |
synth-vhdl_oper: handle to_01. Fix #2372
Diffstat (limited to 'src/synth')
-rw-r--r-- | src/synth/synth-vhdl_oper.adb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/synth/synth-vhdl_oper.adb b/src/synth/synth-vhdl_oper.adb index eb45ae4bb..d9f1c694e 100644 --- a/src/synth/synth-vhdl_oper.adb +++ b/src/synth/synth-vhdl_oper.adb @@ -2021,6 +2021,7 @@ package body Synth.Vhdl_Oper is -- A no-op (with change of bounds). return Create_Value_Net (Get_Net (Ctxt, L), Create_Res_Bound (L)); when Iir_Predefined_Ieee_1164_To_Bit + | Iir_Predefined_Ieee_1164_To_01_Log_Log | Iir_Predefined_Ieee_1164_To_X01_Log | Iir_Predefined_Ieee_1164_To_UX01_Log | Iir_Predefined_Ieee_1164_To_X01Z_Log |