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authorTristan Gingold <tgingold@free.fr>2022-01-15 17:02:34 +0100
committerTristan Gingold <tgingold@free.fr>2022-01-15 17:02:34 +0100
commit126333c7699f7e7e164118e4557472edf19cf61c (patch)
tree64ea2621d0b85540a13945234f44e68a8c2b6d12 /src/synth
parentebd058ec722554f1809de7cdc6e4d1ed951acbe1 (diff)
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synth: do not annotate generic types in package. Fix #1949
Diffstat (limited to 'src/synth')
-rw-r--r--src/synth/elab-vhdl_insts.adb30
1 files changed, 19 insertions, 11 deletions
diff --git a/src/synth/elab-vhdl_insts.adb b/src/synth/elab-vhdl_insts.adb
index cb7a6bd9e..404684c26 100644
--- a/src/synth/elab-vhdl_insts.adb
+++ b/src/synth/elab-vhdl_insts.adb
@@ -107,17 +107,25 @@ package body Elab.Vhdl_Insts is
end;
when Iir_Kind_Interface_Type_Declaration =>
- declare
- Act : Node;
- Act_Typ : Type_Acc;
- begin
- Act := Get_Actual (Assoc);
- if Get_Kind (Act) in Iir_Kinds_Denoting_Name then
- Act := Get_Type (Act);
- end if;
- Act_Typ := Synth_Subtype_Indication (Syn_Inst, Act);
- Create_Subtype_Object (Sub_Inst, Get_Type (Inter), Act_Typ);
- end;
+ if Get_Kind (Get_Parent (Inter)) = Iir_Kind_Entity_Declaration
+ then
+ declare
+ Act : Node;
+ Act_Typ : Type_Acc;
+ begin
+ Act := Get_Actual (Assoc);
+ if Get_Kind (Act) in Iir_Kinds_Denoting_Name then
+ Act := Get_Type (Act);
+ end if;
+ if Get_Kind (Act) in Iir_Kinds_Subtype_Definition then
+ Act_Typ := Synth_Subtype_Indication (Syn_Inst, Act);
+ else
+ Act_Typ := Get_Subtype_Object (Syn_Inst, Act);
+ end if;
+ Create_Subtype_Object
+ (Sub_Inst, Get_Type (Inter), Act_Typ);
+ end;
+ end if;
when Iir_Kind_Interface_Variable_Declaration
| Iir_Kind_Interface_File_Declaration