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| author | Tristan Gingold <tgingold@free.fr> | 2020-04-11 07:47:33 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-04-11 07:47:33 +0200 |
| commit | 068df2adb05ad8de4fb574a408b1e43ab99fb3c3 (patch) | |
| tree | 1a123f9d808332cf615aa2d72de6ce0b69a3a032 /src/synth | |
| parent | ce8abff2b16f3661573a931c2318ba7520926df8 (diff) | |
| download | ghdl-068df2adb05ad8de4fb574a408b1e43ab99fb3c3.tar.gz ghdl-068df2adb05ad8de4fb574a408b1e43ab99fb3c3.tar.bz2 ghdl-068df2adb05ad8de4fb574a408b1e43ab99fb3c3.zip | |
synth-oper: handle STD_LOGIC_ARITH_CONV_INTEGER_LOG. Fix #1208
Diffstat (limited to 'src/synth')
| -rw-r--r-- | src/synth/synth-oper.adb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index b66f7dda3..3d4d4769d 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -1514,6 +1514,7 @@ package body Synth.Oper is return Synth_Conv_Vector (True); when Iir_Predefined_Ieee_Numeric_Std_Toint_Uns_Nat | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns + | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Log | Iir_Predefined_Ieee_Std_Logic_Unsigned_Conv_Integer => -- UNSIGNED to Natural. return Create_Value_Net |