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| author | Tristan Gingold <tgingold@free.fr> | 2019-09-19 07:42:25 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-09-19 07:42:25 +0200 |
| commit | d6b32617528f485274ebadc92494ea8ec7a43c3a (patch) | |
| tree | 85b6394140410c8ff114ea54718fecb5f6e41008 /src/synth/synthesis.ads | |
| parent | 11329df0dfab970daff9900075d5cadd7bfba2ea (diff) | |
| download | ghdl-d6b32617528f485274ebadc92494ea8ec7a43c3a.tar.gz ghdl-d6b32617528f485274ebadc92494ea8ec7a43c3a.tar.bz2 ghdl-d6b32617528f485274ebadc92494ea8ec7a43c3a.zip | |
synth: refactoring to reduce global variables.
Diffstat (limited to 'src/synth/synthesis.ads')
| -rw-r--r-- | src/synth/synthesis.ads | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/synth/synthesis.ads b/src/synth/synthesis.ads index ac458ff88..abf564ba9 100644 --- a/src/synth/synthesis.ads +++ b/src/synth/synthesis.ads @@ -26,7 +26,5 @@ package Synthesis is procedure Synth_Design (Design : Iir; M : out Module; Inst : out Synth_Instance_Acc); - Global_Module : Module; - Synth_Error : exception; end Synthesis; |