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| author | Tristan Gingold <tgingold@free.fr> | 2019-09-20 04:35:25 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-09-20 04:35:25 +0200 |
| commit | 92e75480e2e6aa32318b654aeb59315fecf27ea9 (patch) | |
| tree | 9cf0abfc1f6f4377ea1c988e0692c2811decfd3f /src/synth/synthesis.adb | |
| parent | 5f93829b3dc29022590ffcff8e383f8978add90a (diff) | |
| download | ghdl-92e75480e2e6aa32318b654aeb59315fecf27ea9.tar.gz ghdl-92e75480e2e6aa32318b654aeb59315fecf27ea9.tar.bz2 ghdl-92e75480e2e6aa32318b654aeb59315fecf27ea9.zip | |
synth-context: get rid off Set_Block_Scope.
Diffstat (limited to 'src/synth/synthesis.adb')
| -rw-r--r-- | src/synth/synthesis.adb | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/synth/synthesis.adb b/src/synth/synthesis.adb index 7c51e90c8..fadf6e69a 100644 --- a/src/synth/synthesis.adb +++ b/src/synth/synthesis.adb @@ -19,7 +19,6 @@ -- MA 02110-1301, USA. with Vhdl.Utils; use Vhdl.Utils; -with Vhdl.Annotations; use Vhdl.Annotations; with Synth.Values; use Synth.Values; with Synth.Decls; use Synth.Decls; @@ -50,11 +49,10 @@ package body Synthesis is is use Vhdl.Std_Package; pragma Assert (not Is_Uninstantiated_Package (Pkg)); - Info : constant Sim_Info_Acc := Get_Info (Pkg); Syn_Inst : Synth_Instance_Acc; Val : Value_Acc; begin - Syn_Inst := Make_Instance (Parent_Inst, Info); + Syn_Inst := Make_Instance (Parent_Inst, Pkg); Val := Create_Value_Instance (Syn_Inst); if Get_Kind (Get_Parent (Pkg)) = Iir_Kind_Design_Unit then Create_Package_Object (Parent_Inst, Pkg, Val); |