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author | Tristan Gingold <tgingold@free.fr> | 2021-09-12 09:59:03 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-09-12 09:59:03 +0200 |
commit | a3326f7439515f192ec798ad8f1ceb2b29565345 (patch) | |
tree | dec346bae5d9fecee0f612f78bca234e2a1eb058 /src/synth/synth-vhdl_stmts.adb | |
parent | be8a0febe889ad3211f058df01ad66d2c4f74f50 (diff) | |
download | ghdl-a3326f7439515f192ec798ad8f1ceb2b29565345.tar.gz ghdl-a3326f7439515f192ec798ad8f1ceb2b29565345.tar.bz2 ghdl-a3326f7439515f192ec798ad8f1ceb2b29565345.zip |
vhdl-canon: recurse for default block configuration of a vunit.
Diffstat (limited to 'src/synth/synth-vhdl_stmts.adb')
-rw-r--r-- | src/synth/synth-vhdl_stmts.adb | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index 4e7c6963f..687be6510 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -3570,9 +3570,7 @@ package body Synth.Vhdl_Stmts is if Cond = No_Valtyp or else Read_Discrete (Cond) = 1 then Bod := Get_Generate_Statement_Body (Gen); Config := Get_Generate_Block_Configuration (Bod); - if Config /= Null_Node then - Apply_Block_Configuration (Config, Bod); - end if; + Apply_Block_Configuration (Config, Bod); Synth_Generate_Statement_Body (Syn_Inst, Bod, Name); exit; end if; @@ -3620,10 +3618,7 @@ package body Synth.Vhdl_Stmts is end case; Config := Get_Prev_Block_Configuration (Config); end loop; - -- There is no block configuration in vunits (yet). - if Config /= Null_Node then - Apply_Block_Configuration (Config, Bod); - end if; + Apply_Block_Configuration (Config, Bod); end; -- FIXME: get position ? |