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author | Tristan Gingold <tgingold@free.fr> | 2021-06-21 07:43:55 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-06-21 08:07:13 +0200 |
commit | 09e1764ea6dcf08aa77f8b6f5115caca9de44057 (patch) | |
tree | c66014ebe875cad6ed20c6b7de326dab30b16286 /src/synth/synth-vhdl_stmts.adb | |
parent | 6aaabbfc1716fffd7b7185d53e791e77400950d2 (diff) | |
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testsuite/synth: check ram in mem01 and mem02
Diffstat (limited to 'src/synth/synth-vhdl_stmts.adb')
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