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| author | Tristan Gingold <tgingold@free.fr> | 2023-01-10 18:43:33 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2023-01-10 21:46:58 +0100 |
| commit | 26ed24d29ba32865be97ff1023d6442021a4db60 (patch) | |
| tree | d1b90d9aca10d5c4f76c28c1de309d275fcc229f /src/synth/synth-vhdl_oper.adb | |
| parent | 8bb886e329c1a7cbf0187cbc7a0b177c7cdd0b79 (diff) | |
| download | ghdl-26ed24d29ba32865be97ff1023d6442021a4db60.tar.gz ghdl-26ed24d29ba32865be97ff1023d6442021a4db60.tar.bz2 ghdl-26ed24d29ba32865be97ff1023d6442021a4db60.zip | |
synth: handle indexes in arrays conversion
Diffstat (limited to 'src/synth/synth-vhdl_oper.adb')
| -rw-r--r-- | src/synth/synth-vhdl_oper.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_oper.adb b/src/synth/synth-vhdl_oper.adb index 5d5d9cb5c..22ef709aa 100644 --- a/src/synth/synth-vhdl_oper.adb +++ b/src/synth/synth-vhdl_oper.adb @@ -2209,7 +2209,7 @@ package body Synth.Vhdl_Oper is Subprg_Inst := Make_Instance (Syn_Inst, Imp); Synth_Subprogram_Associations - (Subprg_Inst, Syn_Inst, Inter_Chain, Assoc_Chain); + (Subprg_Inst, Syn_Inst, Inter_Chain, Assoc_Chain, Expr); if Is_Error (Subprg_Inst) then Res := No_Valtyp; |