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| author | Tristan Gingold <tgingold@free.fr> | 2022-05-07 06:50:29 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-05-07 14:54:19 +0200 |
| commit | 79a93b9ff2e6787ef2185104188e768b4d02e53f (patch) | |
| tree | 89be02212a8e04d4fd492a9b62472a9a944d3f53 /src/synth/synth-vhdl_insts.adb | |
| parent | a2140be0431434748b9a3fec1dd984a5493f3a31 (diff) | |
| download | ghdl-79a93b9ff2e6787ef2185104188e768b4d02e53f.tar.gz ghdl-79a93b9ff2e6787ef2185104188e768b4d02e53f.tar.bz2 ghdl-79a93b9ff2e6787ef2185104188e768b4d02e53f.zip | |
synth-vhdl_insts: handle interfaces of type interface type. Fix #2053
Diffstat (limited to 'src/synth/synth-vhdl_insts.adb')
| -rw-r--r-- | src/synth/synth-vhdl_insts.adb | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_insts.adb b/src/synth/synth-vhdl_insts.adb index 6175d5d8e..458981f37 100644 --- a/src/synth/synth-vhdl_insts.adb +++ b/src/synth/synth-vhdl_insts.adb @@ -377,6 +377,17 @@ package body Synth.Vhdl_Insts is end case; end Count_Nbr_Ports; + function Get_Type2 (N : Node) return Node + is + Res : Node; + begin + Res := Get_Type (N); + if Get_Kind (Res) = Iir_Kind_Interface_Type_Definition then + Res := Get_Associated_Type (Res); + end if; + return Res; + end Get_Type2; + procedure Build_Ports_Desc (Descs : in out Port_Desc_Array; Idx : in out Port_Nbr; Pkind : Port_Kind; @@ -405,7 +416,7 @@ package body Synth.Vhdl_Insts is | Type_Unbounded_Record => declare Els : constant Node_Flist := Get_Elements_Declaration_List - (Get_Type (Inter)); + (Get_Type2 (Inter)); El : Node; begin for I in Typ.Rec.E'Range loop |