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author | Tristan Gingold <tgingold@free.fr> | 2021-04-16 06:50:16 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-04-16 06:58:04 +0200 |
commit | 2cd953d9b01cd9faf94bc66a466cb640485946f8 (patch) | |
tree | 0a8114abf2225b2a0dfdf3149e7376e4f34902e5 /src/synth/synth-vhdl_files.ads | |
parent | 17fe76dff5ac755c6d3162bdd21c49508ada566e (diff) | |
download | ghdl-2cd953d9b01cd9faf94bc66a466cb640485946f8.tar.gz ghdl-2cd953d9b01cd9faf94bc66a466cb640485946f8.tar.bz2 ghdl-2cd953d9b01cd9faf94bc66a466cb640485946f8.zip |
synth: refactoring (synth.files_operations -> synth.vhdl_files)
Diffstat (limited to 'src/synth/synth-vhdl_files.ads')
-rw-r--r-- | src/synth/synth-vhdl_files.ads | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/synth/synth-vhdl_files.ads b/src/synth/synth-vhdl_files.ads new file mode 100644 index 000000000..1d373664e --- /dev/null +++ b/src/synth/synth-vhdl_files.ads @@ -0,0 +1,48 @@ +-- Create declarations for synthesis. +-- Copyright (C) 2017 Tristan Gingold +-- +-- This file is part of GHDL. +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 2 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see <gnu.org/licenses>. + +with Vhdl.Nodes; use Vhdl.Nodes; + +with Synth.Source; use Synth.Source; +with Synth.Values; use Synth.Values; +with Synth.Vhdl_Context; use Synth.Vhdl_Context; + +package Synth.Vhdl_Files is + -- Raised in case of un-recoverable error. + File_Execution_Error : exception; + + -- Set the current design unit, so that its path can be used to search + -- files. + procedure Set_Design_Unit (Unit : Node); + + function Elaborate_File_Declaration + (Syn_Inst : Synth_Instance_Acc; Decl : Node) return File_Index; + + function Endfile (F : File_Index; Loc : Syn_Src) return Boolean; + + procedure Synth_File_Open + (Syn_Inst : Synth_Instance_Acc; Imp : Node; Loc : Node); + procedure Synth_File_Close + (Syn_Inst : Synth_Instance_Acc; Imp : Node; Loc : Node); + + procedure Synth_Untruncated_Text_Read + (Syn_Inst : Synth_Instance_Acc; Imp : Node; Loc : Node); + + procedure Synth_File_Read + (Syn_Inst : Synth_Instance_Acc; Imp : Node; Loc : Node); +end Synth.Vhdl_Files; |