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| author | Tristan Gingold <tgingold@free.fr> | 2022-09-16 19:55:00 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-09-16 19:55:00 +0200 |
| commit | 2a51f0c5c65d5d71c5abbd0631a0ec5660678520 (patch) | |
| tree | a3f077806dced3a7106bf990f589184fbde30d62 /src/synth/synth-vhdl_decls.adb | |
| parent | 7f411fd357bc9a17dc3d0593b86f4b8412a94632 (diff) | |
| download | ghdl-2a51f0c5c65d5d71c5abbd0631a0ec5660678520.tar.gz ghdl-2a51f0c5c65d5d71c5abbd0631a0ec5660678520.tar.bz2 ghdl-2a51f0c5c65d5d71c5abbd0631a0ec5660678520.zip | |
synth: preliminary work to factorize code
Diffstat (limited to 'src/synth/synth-vhdl_decls.adb')
| -rw-r--r-- | src/synth/synth-vhdl_decls.adb | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/synth/synth-vhdl_decls.adb b/src/synth/synth-vhdl_decls.adb index 36fbf818d..c3945a82c 100644 --- a/src/synth/synth-vhdl_decls.adb +++ b/src/synth/synth-vhdl_decls.adb @@ -500,7 +500,6 @@ package body Synth.Vhdl_Decls is Atype : constant Node := Get_Declaration_Type (Decl); Marker : Mark_Type; Off : Value_Offsets; - Dyn : Vhdl_Stmts.Dyn_Name; Res : Valtyp; Obj_Typ : Type_Acc; Base : Valtyp; @@ -516,9 +515,8 @@ package body Synth.Vhdl_Decls is Mark_Expr_Pool (Marker); - Vhdl_Stmts.Synth_Assignment_Prefix (Syn_Inst, Get_Name (Decl), - Base, Typ, Off, Dyn); - pragma Assert (Dyn.Voff = No_Net); + Vhdl_Stmts.Synth_Assignment_Prefix + (Syn_Inst, Get_Name (Decl), Base, Typ, Off); Typ := Unshare (Typ, Instance_Pool); if Base.Val.Kind = Value_Net then -- Object is a net if it is not writable. Extract the |