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| author | Tristan Gingold <tgingold@free.fr> | 2019-11-06 21:02:20 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-11-06 21:02:20 +0100 |
| commit | 0548bf11b1dab488335c647f380a66a17caa2433 (patch) | |
| tree | c20d7cb20d1341159bd90a7c4c0142eadfdb7e0a /src/synth/synth-stmts.adb | |
| parent | dedd6c9534c55a09048aa15bffb3e9de2253badd (diff) | |
| download | ghdl-0548bf11b1dab488335c647f380a66a17caa2433.tar.gz ghdl-0548bf11b1dab488335c647f380a66a17caa2433.tar.bz2 ghdl-0548bf11b1dab488335c647f380a66a17caa2433.zip | |
synth: handle record assignment for variables. Fix #1011
Diffstat (limited to 'src/synth/synth-stmts.adb')
| -rw-r--r-- | src/synth/synth-stmts.adb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index 08fe473d0..758a7aaad 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -386,6 +386,10 @@ package body Synth.Stmts is Val.Arr.V (I), Loc); end loop; end; + when Value_Record => + for I in Targ.Rec.V'Range loop + Assign_Value (Targ.Rec.V (I), Val.Rec.V (I), Loc); + end loop; when others => raise Internal_Error; end case; |