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| author | Tristan Gingold <tgingold@free.fr> | 2020-01-12 21:41:07 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-01-12 21:41:07 +0100 |
| commit | 9ea42a0fd9915002d00509da079ef92309514a00 (patch) | |
| tree | 21236cbecfb4cf29bcacbad182fa1a1121aa0934 /src/synth/synth-static_oper.adb | |
| parent | 83669ed954d6890747815b7e85b3abb27085ad5d (diff) | |
| download | ghdl-9ea42a0fd9915002d00509da079ef92309514a00.tar.gz ghdl-9ea42a0fd9915002d00509da079ef92309514a00.tar.bz2 ghdl-9ea42a0fd9915002d00509da079ef92309514a00.zip | |
synth-static_oper: handle unary not for std_logic. For #1080
Diffstat (limited to 'src/synth/synth-static_oper.adb')
| -rw-r--r-- | src/synth/synth-static_oper.adb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/synth/synth-static_oper.adb b/src/synth/synth-static_oper.adb index 9a191a26f..02662ab1e 100644 --- a/src/synth/synth-static_oper.adb +++ b/src/synth/synth-static_oper.adb @@ -509,6 +509,11 @@ package body Synth.Static_Oper is when Iir_Predefined_Ieee_1164_Vector_Not => return Synth_Vector_Monadic (Operand, Not_Table); + when Iir_Predefined_Ieee_1164_Scalar_Not => + return Create_Value_Discrete + (Std_Ulogic'Pos (Not_Table (Std_Ulogic'Val (Operand.Scal))), + Oper_Typ); + when Iir_Predefined_Ieee_1164_Vector_Or_Reduce => return Synth_Vector_Reduce ('0', Operand, Or_Table); |