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| author | Tristan Gingold <tgingold@free.fr> | 2019-11-13 18:44:20 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-11-13 18:44:20 +0100 |
| commit | 928762b7844d06e75a7dc5e86840969ba82b00fe (patch) | |
| tree | c54247ce26b8d8192d12f9932f9d70c5de6cf7b0 /src/synth/synth-ieee-std_logic_1164.ads | |
| parent | cc0ea4be71cfb321f85d8195328f1db3a0fbb427 (diff) | |
| download | ghdl-928762b7844d06e75a7dc5e86840969ba82b00fe.tar.gz ghdl-928762b7844d06e75a7dc5e86840969ba82b00fe.tar.bz2 ghdl-928762b7844d06e75a7dc5e86840969ba82b00fe.zip | |
synth: handle static unsigned/unsigned add.
Diffstat (limited to 'src/synth/synth-ieee-std_logic_1164.ads')
| -rw-r--r-- | src/synth/synth-ieee-std_logic_1164.ads | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/synth/synth-ieee-std_logic_1164.ads b/src/synth/synth-ieee-std_logic_1164.ads index 36ef3bc34..f54ef0257 100644 --- a/src/synth/synth-ieee-std_logic_1164.ads +++ b/src/synth/synth-ieee-std_logic_1164.ads @@ -35,6 +35,9 @@ package Synth.Ieee.Std_Logic_1164 is '-' -- Don't care. ); + -- Vector of logic state. + type Std_Logic_Vector is array (Natural range <>) of Std_Ulogic; + -- type Table_1d is array (Std_Ulogic) of Std_Ulogic; type Table_2d is array (Std_Ulogic, Std_Ulogic) of Std_Ulogic; |