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author | Tristan Gingold <tgingold@free.fr> | 2021-11-01 19:50:19 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-11-01 21:11:10 +0100 |
commit | 86fd1ab3079b50c5b7234db2cedf3d1e8c0f081b (patch) | |
tree | e34bdcf719bdc08cb22a65e04ad67b57b0c06879 /src/synth/synth-ieee-std_logic_1164.ads | |
parent | 74043fa1aa40c375c7f299e6b5f1b6ea9150580e (diff) | |
download | ghdl-86fd1ab3079b50c5b7234db2cedf3d1e8c0f081b.tar.gz ghdl-86fd1ab3079b50c5b7234db2cedf3d1e8c0f081b.tar.bz2 ghdl-86fd1ab3079b50c5b7234db2cedf3d1e8c0f081b.zip |
synth: do full elaboration before synthesis
Diffstat (limited to 'src/synth/synth-ieee-std_logic_1164.ads')
-rw-r--r-- | src/synth/synth-ieee-std_logic_1164.ads | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-ieee-std_logic_1164.ads b/src/synth/synth-ieee-std_logic_1164.ads index c3670882f..33a298f81 100644 --- a/src/synth/synth-ieee-std_logic_1164.ads +++ b/src/synth/synth-ieee-std_logic_1164.ads @@ -18,7 +18,7 @@ with Types; use Types; -with Synth.Memtype; use Synth.Memtype; +with Elab.Memtype; use Elab.Memtype; package Synth.Ieee.Std_Logic_1164 is |