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| author | Tristan Gingold <tgingold@free.fr> | 2019-04-16 19:03:16 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-04-16 19:03:16 +0200 |
| commit | 7c7c8a24f20c62ff08399ddb1d7e18813c1f7fd2 (patch) | |
| tree | b283200260bfe95e67949c943e3e17282415d5b6 /src/synth/synth-expr.ads | |
| parent | d96f3990b8f0b5b71f224e35e008d44adab05fc4 (diff) | |
| download | ghdl-7c7c8a24f20c62ff08399ddb1d7e18813c1f7fd2.tar.gz ghdl-7c7c8a24f20c62ff08399ddb1d7e18813c1f7fd2.tar.bz2 ghdl-7c7c8a24f20c62ff08399ddb1d7e18813c1f7fd2.zip | |
synth: improve generation of aggregates.
Diffstat (limited to 'src/synth/synth-expr.ads')
| -rw-r--r-- | src/synth/synth-expr.ads | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-expr.ads b/src/synth/synth-expr.ads index 665fbc847..a80e1d7db 100644 --- a/src/synth/synth-expr.ads +++ b/src/synth/synth-expr.ads @@ -29,7 +29,7 @@ package Synth.Expr is procedure To_Logic (Lit : Iir_Value_Literal_Acc; Val : out Uns32; - Xz : out Uns32); + Zx : out Uns32); function Bit_Extract (Val : Value_Acc; Off : Uns32) return Value_Acc; |