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| author | Tristan Gingold <tgingold@free.fr> | 2019-08-05 07:36:32 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-08-05 07:36:32 +0200 |
| commit | 6ee126fe715834c13cabf661030b5f76a11d6fd3 (patch) | |
| tree | a5a481ab002c49d223c88ebbee439911e2e208ea /src/synth/synth-expr.ads | |
| parent | 6aac33f4b4ff3e3c1de252aec84de1e3e3f4ff8e (diff) | |
| download | ghdl-6ee126fe715834c13cabf661030b5f76a11d6fd3.tar.gz ghdl-6ee126fe715834c13cabf661030b5f76a11d6fd3.tar.bz2 ghdl-6ee126fe715834c13cabf661030b5f76a11d6fd3.zip | |
synth: handle subtype conversions.
Diffstat (limited to 'src/synth/synth-expr.ads')
| -rw-r--r-- | src/synth/synth-expr.ads | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/synth/synth-expr.ads b/src/synth/synth-expr.ads index f7edc2417..be6daba0d 100644 --- a/src/synth/synth-expr.ads +++ b/src/synth/synth-expr.ads @@ -21,6 +21,7 @@ with Ada.Unchecked_Deallocation; with Types; use Types; with Netlists; use Netlists; +with Synth.Source; with Synth.Values; use Synth.Values; with Synth.Context; use Synth.Context; with Vhdl.Nodes; use Vhdl.Nodes; @@ -32,6 +33,10 @@ package Synth.Expr is procedure Set_Location (N : Net; Loc : Node); pragma Inline (Set_Location); + function Synth_Subtype_Conversion + (Val : Value_Acc; Dtype : Type_Acc; Loc : Source.Syn_Src) + return Value_Acc; + procedure From_Std_Logic (Enum : Int64; Val : out Uns32; Zx : out Uns32); procedure From_Bit (Enum : Int64; Val : out Uns32); procedure To_Logic |