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| author | Tristan Gingold <tgingold@free.fr> | 2020-04-03 08:46:23 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-04-06 20:10:55 +0200 |
| commit | beb01818f52362329556f663dcb176747f8cbb89 (patch) | |
| tree | dd215b972b59a6fccf9b9bf1217d52129e763253 /src/synth/synth-disp_vhdl.adb | |
| parent | 84e332e02c1903b110d3141934184ed5a0906db4 (diff) | |
| download | ghdl-beb01818f52362329556f663dcb176747f8cbb89.tar.gz ghdl-beb01818f52362329556f663dcb176747f8cbb89.tar.bz2 ghdl-beb01818f52362329556f663dcb176747f8cbb89.zip | |
synth: add value_memory and use it to store objects value.
Diffstat (limited to 'src/synth/synth-disp_vhdl.adb')
| -rw-r--r-- | src/synth/synth-disp_vhdl.adb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/synth/synth-disp_vhdl.adb b/src/synth/synth-disp_vhdl.adb index 436ba938a..375f72e85 100644 --- a/src/synth/synth-disp_vhdl.adb +++ b/src/synth/synth-disp_vhdl.adb @@ -214,7 +214,7 @@ package body Synth.Disp_Vhdl is Disp_In_Converter (Mname, Pfx & '.' & Name_Table.Image (Get_Identifier (El)), - Off + Et.Off, Get_Type (El), Et.Typ, Rec_Full); + Off + Et.Boff, Get_Type (El), Et.Typ, Rec_Full); end; end loop; end; @@ -370,7 +370,7 @@ package body Synth.Disp_Vhdl is Disp_Out_Converter (Mname, Pfx & '.' & Name_Table.Image (Get_Identifier (El)), - Off + Et.Off, Get_Type (El), Et.Typ, Rec_Full); + Off + Et.Boff, Get_Type (El), Et.Typ, Rec_Full); end; end loop; end; |