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| author | Tristan Gingold <tgingold@free.fr> | 2022-06-27 19:28:01 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-06-27 19:37:33 +0200 |
| commit | a036958a9adc31011729aab02af9eec48f80bc8a (patch) | |
| tree | 2534000aaa570fde4d0359cf0c969f0d8a7a44cd /src/synth/netlists-memories.adb | |
| parent | 060840d4176d7e5b775616e8a702bd751765c753 (diff) | |
| download | ghdl-a036958a9adc31011729aab02af9eec48f80bc8a.tar.gz ghdl-a036958a9adc31011729aab02af9eec48f80bc8a.tar.bz2 ghdl-a036958a9adc31011729aab02af9eec48f80bc8a.zip | |
synth: rework #2109 - remove null wires
Diffstat (limited to 'src/synth/netlists-memories.adb')
| -rw-r--r-- | src/synth/netlists-memories.adb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/synth/netlists-memories.adb b/src/synth/netlists-memories.adb index 2764ec380..ffc3316ba 100644 --- a/src/synth/netlists-memories.adb +++ b/src/synth/netlists-memories.adb @@ -243,6 +243,11 @@ package body Netlists.Memories is end if; Res := Res + 1; N := Get_Input_Net (Inst, 0); + when Id_Const_X => + -- For a null wire. + pragma Assert (Res = 0); + pragma Assert (Get_Width (N) = 0); + return 0; when others => raise Internal_Error; end case; |