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authorTristan Gingold <tgingold@free.fr>2022-09-28 06:43:44 +0200
committerTristan Gingold <tgingold@free.fr>2022-09-28 06:43:44 +0200
commit5993986a91f3f41813b890e6b9d10cc5a3beea17 (patch)
treeabc04887c28d2784983f80d7ed161a7d1a19ea5b /src/synth/elab-vhdl_values.adb
parente15f01013928d7023a1f6d4bc93aa59fef9bffcf (diff)
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synth: handle null-range loops
Diffstat (limited to 'src/synth/elab-vhdl_values.adb')
-rw-r--r--src/synth/elab-vhdl_values.adb9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/synth/elab-vhdl_values.adb b/src/synth/elab-vhdl_values.adb
index 3dc7cd1e2..0dff785a8 100644
--- a/src/synth/elab-vhdl_values.adb
+++ b/src/synth/elab-vhdl_values.adb
@@ -565,17 +565,24 @@ package body Elab.Vhdl_Values is
end case;
end Get_Memtyp;
- procedure Update_Index (Rng : Discrete_Range_Type; V : in out Valtyp)
+ procedure Update_Index
+ (Rng : Discrete_Range_Type; Valid : out Boolean; V : in out Valtyp)
is
T : Int64;
begin
T := Read_Discrete (V);
+ if T = Rng.Right then
+ Valid := False;
+ return;
+ end if;
+
case Rng.Dir is
when Dir_To =>
T := T + 1;
when Dir_Downto =>
T := T - 1;
end case;
+ Valid := True;
Write_Discrete (V, T);
end Update_Index;
end Elab.Vhdl_Values;