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| author | Tristan Gingold <tgingold@free.fr> | 2022-02-22 20:58:53 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-02-22 20:58:53 +0100 |
| commit | 7526637883e495d3c8656602075db4d641747b73 (patch) | |
| tree | 5d2e336cea5e1a7a62921abda7f8c3b957440232 /src/synth/elab-vhdl_types.adb | |
| parent | 81441654d58fd9f69c1ca694915ffbb40f7fc519 (diff) | |
| download | ghdl-7526637883e495d3c8656602075db4d641747b73.tar.gz ghdl-7526637883e495d3c8656602075db4d641747b73.tar.bz2 ghdl-7526637883e495d3c8656602075db4d641747b73.zip | |
synth: fix handling of record constraints in subtype. Fix #1961
Diffstat (limited to 'src/synth/elab-vhdl_types.adb')
| -rw-r--r-- | src/synth/elab-vhdl_types.adb | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/synth/elab-vhdl_types.adb b/src/synth/elab-vhdl_types.adb index 7d726d154..54bd3469b 100644 --- a/src/synth/elab-vhdl_types.adb +++ b/src/synth/elab-vhdl_types.adb @@ -198,6 +198,8 @@ package body Elab.Vhdl_Types is function Synth_Record_Type_Definition (Syn_Inst : Synth_Instance_Acc; Def : Node) return Type_Acc is + Is_Subtype : constant Boolean := + Get_Kind (Def) = Iir_Kind_Record_Subtype_Definition; El_List : constant Node_Flist := Get_Elements_Declaration_List (Def); Rec_Els : Rec_El_Array_Acc; El : Node; @@ -210,7 +212,13 @@ package body Elab.Vhdl_Types is for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); El_Type := Get_Type (El); - El_Typ := Synth_Subtype_Indication_If_Anonymous (Syn_Inst, El_Type); + if Is_Subtype then + Synth_Subtype_Indication_If_Anonymous (Syn_Inst, El_Type); + El_Typ := Get_Subtype_Object (Syn_Inst, El_Type); + else + El_Typ := Synth_Subtype_Indication_If_Anonymous + (Syn_Inst, El_Type); + end if; Rec_Els.E (Iir_Index32 (I + 1)).Typ := El_Typ; end loop; |