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author | Tristan Gingold <tgingold@free.fr> | 2022-09-19 07:40:23 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-09-19 07:40:23 +0200 |
commit | e9d3ea593a34798d9128393731bbdc543f4a850e (patch) | |
tree | 17a59d89d6f55f9958e9ac92fdf53ae01b2295b0 /src/synth/elab-vhdl_annotations.ads | |
parent | a5f7e9e324210b5d73924e903f24e870572bb096 (diff) | |
download | ghdl-e9d3ea593a34798d9128393731bbdc543f4a850e.tar.gz ghdl-e9d3ea593a34798d9128393731bbdc543f4a850e.tar.bz2 ghdl-e9d3ea593a34798d9128393731bbdc543f4a850e.zip |
synth: simplify elab-vhdl_annotations
Diffstat (limited to 'src/synth/elab-vhdl_annotations.ads')
-rw-r--r-- | src/synth/elab-vhdl_annotations.ads | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/synth/elab-vhdl_annotations.ads b/src/synth/elab-vhdl_annotations.ads index 15f643c25..fa06ff6d3 100644 --- a/src/synth/elab-vhdl_annotations.ads +++ b/src/synth/elab-vhdl_annotations.ads @@ -18,9 +18,6 @@ with Types; use Types; with Vhdl.Nodes; use Vhdl.Nodes; package Elab.Vhdl_Annotations is - -- If True, annotate for synthesis. - Flag_Synthesis : Boolean := False; - type Object_Slot_Type is new Natural; -- This slot is not used. |