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| author | Tristan Gingold <tgingold@free.fr> | 2022-10-06 20:36:37 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-10-06 20:36:37 +0200 |
| commit | 6bb1a59f471b3e91bb4c68567a841c49dd9273ae (patch) | |
| tree | 4ec39a474a7430f9f1ad27060e069dba40ac4869 /src/simul/simul-vhdl_elab.adb | |
| parent | 7d49ce2362ef0c9c690db4616cbcd202b6f72300 (diff) | |
| download | ghdl-6bb1a59f471b3e91bb4c68567a841c49dd9273ae.tar.gz ghdl-6bb1a59f471b3e91bb4c68567a841c49dd9273ae.tar.bz2 ghdl-6bb1a59f471b3e91bb4c68567a841c49dd9273ae.zip | |
simul: fix signal attribute or guard as actual in connections
Diffstat (limited to 'src/simul/simul-vhdl_elab.adb')
| -rw-r--r-- | src/simul/simul-vhdl_elab.adb | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/src/simul/simul-vhdl_elab.adb b/src/simul/simul-vhdl_elab.adb index 34522853f..a8c285be6 100644 --- a/src/simul/simul-vhdl_elab.adb +++ b/src/simul/simul-vhdl_elab.adb @@ -277,33 +277,33 @@ package body Simul.Vhdl_Elab is when Iir_Linkage_Mode => Gather_Signal ((Mode_Linkage, Decl, Inst, null, null, null, No_Sensitivity_Index, No_Signal_Index, - No_Driver_Index, No_Connect_Index, + No_Connect_Index, No_Driver_Index, No_Disconnect_Index, null)); when Iir_Buffer_Mode => Gather_Signal ((Mode_Buffer, Decl, Inst, null, null, null, No_Sensitivity_Index, No_Signal_Index, - No_Driver_Index, No_Connect_Index, + No_Connect_Index, No_Driver_Index, No_Disconnect_Index, null)); when Iir_Out_Mode => Gather_Signal ((Mode_Out, Decl, Inst, null, null, null, No_Sensitivity_Index, No_Signal_Index, - No_Driver_Index, No_Connect_Index, + No_Connect_Index, No_Driver_Index, No_Disconnect_Index, null)); when Iir_Inout_Mode => Gather_Signal ((Mode_Inout, Decl, Inst, null, null, null, No_Sensitivity_Index, No_Signal_Index, - No_Driver_Index, No_Connect_Index, + No_Connect_Index, No_Driver_Index, No_Disconnect_Index, null)); when Iir_In_Mode => Gather_Signal ((Mode_In, Decl, Inst, null, null, null, No_Sensitivity_Index, No_Signal_Index, - No_Driver_Index, No_Connect_Index, + No_Connect_Index, No_Driver_Index, No_Disconnect_Index, null)); end case; when Iir_Kind_Signal_Declaration => Gather_Signal ((Mode_Signal, Decl, Inst, null, null, null, No_Sensitivity_Index, No_Signal_Index, - No_Driver_Index, No_Connect_Index, + No_Connect_Index, No_Driver_Index, No_Disconnect_Index, null)); when Iir_Kind_Configuration_Specification => null; @@ -336,7 +336,8 @@ package body Simul.Vhdl_Elab is end; when Iir_Kind_Above_Attribute => Gather_Signal ((Mode_Above, Decl, Inst, null, null, null, - No_Sensitivity_Index, No_Signal_Index)); + No_Sensitivity_Index, No_Signal_Index, + No_Connect_Index)); when Iir_Kind_Quiet_Attribute => declare T : Std_Time; @@ -346,7 +347,7 @@ package body Simul.Vhdl_Elab is Pfx := Compute_Sub_Signal (Inst, Get_Prefix (Decl)); Gather_Signal ((Mode_Quiet, Decl, Inst, null, null, null, No_Sensitivity_Index, No_Signal_Index, - T, Pfx)); + No_Connect_Index, T, Pfx)); end; when Iir_Kind_Stable_Attribute => declare @@ -923,7 +924,8 @@ package body Simul.Vhdl_Elab is begin if Guard /= Null_Node then Gather_Signal ((Mode_Guard, Guard, Inst, null, null, null, - No_Sensitivity_Index, No_Signal_Index)); + No_Sensitivity_Index, No_Signal_Index, + No_Connect_Index)); end if; if Hdr /= Null_Node then Gather_Processes_Decls (Inst, Get_Port_Chain (Hdr)); @@ -965,7 +967,7 @@ package body Simul.Vhdl_Elab is for I in Signals_Table.First .. Signals_Table.Last loop Signals_Table.Table (I) := (Mode_End, Null_Node, null, null, null, null, - No_Sensitivity_Index, No_Signal_Index); + No_Sensitivity_Index, No_Signal_Index, No_Connect_Index); end loop; -- Gather declarations of top-level packages. |