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| author | Tristan Gingold <tgingold@free.fr> | 2022-09-16 04:24:58 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-09-16 04:24:58 +0200 |
| commit | daa29e96da7ee3557d71005cd31c554f5fd74f34 (patch) | |
| tree | cbb43b15b54d6763f2ff4f0e9d6812a9df1393d6 /src/ghdldrv | |
| parent | a8fae0fb11d5dbe0a196af689301f48f5cca64ee (diff) | |
| download | ghdl-daa29e96da7ee3557d71005cd31c554f5fd74f34.tar.gz ghdl-daa29e96da7ee3557d71005cd31c554f5fd74f34.tar.bz2 ghdl-daa29e96da7ee3557d71005cd31c554f5fd74f34.zip | |
simul: improve error handling during elaboration
Diffstat (limited to 'src/ghdldrv')
| -rw-r--r-- | src/ghdldrv/ghdlsimul.adb | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/ghdldrv/ghdlsimul.adb b/src/ghdldrv/ghdlsimul.adb index 41dac66d2..bdc5ef6c8 100644 --- a/src/ghdldrv/ghdlsimul.adb +++ b/src/ghdldrv/ghdlsimul.adb @@ -94,16 +94,16 @@ package body Ghdlsimul is Inst := Elab.Vhdl_Insts.Elab_Top_Unit (Lib_Unit); if Errorout.Nbr_Errors > 0 then - if Grt.Errors.Expect_Failure then - return; - else - raise Errorout.Compilation_Error; - end if; + raise Errorout.Compilation_Error; end if; Simul.Vhdl_Elab.Gather_Processes (Inst); Simul.Vhdl_Elab.Elab_Processes; + if Errorout.Nbr_Errors > 0 then + raise Errorout.Compilation_Error; + end if; + if False then Elab.Vhdl_Debug.Disp_Hierarchy (Inst, False, True); end if; |