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author | Tristan Gingold <tgingold@free.fr> | 2019-05-20 20:42:59 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-05-21 20:41:21 +0200 |
commit | 7e084bc2812f701d766907d18e74753b5e44ef7d (patch) | |
tree | 1cb1db47f1e01fa9e087a62399989544882adc31 /src/ghdldrv | |
parent | 41439f51ce81a986f029622c901d81f9edfae2ff (diff) | |
download | ghdl-7e084bc2812f701d766907d18e74753b5e44ef7d.tar.gz ghdl-7e084bc2812f701d766907d18e74753b5e44ef7d.tar.bz2 ghdl-7e084bc2812f701d766907d18e74753b5e44ef7d.zip |
synth: add disp_vhdl.
Diffstat (limited to 'src/ghdldrv')
-rw-r--r-- | src/ghdldrv/ghdlsynth.adb | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/ghdldrv/ghdlsynth.adb b/src/ghdldrv/ghdlsynth.adb index 48a10e753..cec4a7056 100644 --- a/src/ghdldrv/ghdlsynth.adb +++ b/src/ghdldrv/ghdlsynth.adb @@ -29,6 +29,7 @@ with Simul.Elaboration; with Synthesis; with Netlists.Dump; +with Netlists.Disp_Vhdl; package body Ghdlsynth is -- Command --synth @@ -125,8 +126,12 @@ package body Ghdlsynth is Res : Netlists.Module; begin Res := Ghdl_Synth (Args); - Netlists.Dump.Flag_Disp_Inline := Cmd.Disp_Inline; - Netlists.Dump.Disp_Module (Res); + if False then + Netlists.Dump.Flag_Disp_Inline := Cmd.Disp_Inline; + Netlists.Dump.Disp_Module (Res); + else + Netlists.Disp_Vhdl.Disp_Vhdl (Res); + end if; end Perform_Action; procedure Register_Commands is |