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author | Tristan Gingold <tgingold@free.fr> | 2022-09-17 16:36:34 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-09-17 19:03:27 +0200 |
commit | 69ee33d1f0e4559b868068c955ef9c24f0438a11 (patch) | |
tree | c6088f2f334bc1650536e245b6270ba7afbbccbb /src/ghdldrv | |
parent | 6e800dc93b88801fcb9465cb3ca95b14e8489200 (diff) | |
download | ghdl-69ee33d1f0e4559b868068c955ef9c24f0438a11.tar.gz ghdl-69ee33d1f0e4559b868068c955ef9c24f0438a11.tar.bz2 ghdl-69ee33d1f0e4559b868068c955ef9c24f0438a11.zip |
synth: factorize code (reuse synth_constant_declaration)
Diffstat (limited to 'src/ghdldrv')
-rw-r--r-- | src/ghdldrv/ghdlsimul.adb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/ghdldrv/ghdlsimul.adb b/src/ghdldrv/ghdlsimul.adb index bdc5ef6c8..94d7c0e97 100644 --- a/src/ghdldrv/ghdlsimul.adb +++ b/src/ghdldrv/ghdlsimul.adb @@ -89,6 +89,8 @@ package body Ghdlsimul is end if; end loop; + Synth.Flags.Flag_Simulation := True; + Lib_Unit := Get_Library_Unit (Config); pragma Assert (Get_Kind (Lib_Unit) /= Iir_Kind_Foreign_Module); Inst := Elab.Vhdl_Insts.Elab_Top_Unit (Lib_Unit); |