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authorgingold <gingold@b72b5c32-5f01-0410-b925-b5c7b92870f7>2006-08-06 06:45:40 +0000
committergingold <gingold@b72b5c32-5f01-0410-b925-b5c7b92870f7>2006-08-06 06:45:40 +0000
commit63925c8de8d3171e6b258796e4d167524691490a (patch)
treea8e7971f5889da0b7bba2cd7f9624c704d0145df /sem.adb
parent3841c37a946481815c89928ccd15b71b608aa526 (diff)
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bugs fixed
Diffstat (limited to 'sem.adb')
-rw-r--r--sem.adb18
1 files changed, 18 insertions, 0 deletions
diff --git a/sem.adb b/sem.adb
index 1ce422964..060a67a3d 100644
--- a/sem.adb
+++ b/sem.adb
@@ -487,6 +487,21 @@ package body Sem is
when others =>
-- Expression.
Set_Collapse_Signal_Flag (El, False);
+
+ -- If there is an IN conversion, re-integrate it into
+ -- the actual.
+ declare
+ In_Conv : Iir;
+ begin
+ In_Conv := Get_In_Conversion (El);
+ if In_Conv /= Null_Iir then
+ Set_In_Conversion (El, Null_Iir);
+ Set_Expr_Staticness
+ (In_Conv, Get_Expr_Staticness (Actual));
+ Actual := In_Conv;
+ Set_Actual (El, Actual);
+ end if;
+ end;
if Flags.Vhdl_Std >= Vhdl_93c then
-- LRM93 1.1.1.2 Ports
-- Moreover, the ports of a block may be associated
@@ -1079,6 +1094,9 @@ package body Sem is
| Iir_Kind_Variable_Interface_Declaration
| Iir_Kind_Signal_Interface_Declaration
| Iir_Kind_File_Interface_Declaration =>
+ if Get_Identifier (Left) /= Get_Identifier (Right) then
+ return False;
+ end if;
if Get_Lexical_Layout (Left) /= Get_Lexical_Layout (Right)
or else Get_Mode (Left) /= Get_Mode (Right)
then