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| author | Tristan Gingold <tgingold@free.fr> | 2021-06-18 20:35:57 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-06-18 20:35:57 +0200 |
| commit | cabe6993a017fc4e4a621e092c5b0cc0a10cc0f3 (patch) | |
| tree | b2b49906bd31164280ab5accd9803f292947aef5 /pyGHDL/dom | |
| parent | 2d84548e3827bd3d42c3e2bce159b68d70a8740d (diff) | |
| download | ghdl-cabe6993a017fc4e4a621e092c5b0cc0a10cc0f3.tar.gz ghdl-cabe6993a017fc4e4a621e092c5b0cc0a10cc0f3.tar.bz2 ghdl-cabe6993a017fc4e4a621e092c5b0cc0a10cc0f3.zip | |
pyGHDL/dom: reformatting
Diffstat (limited to 'pyGHDL/dom')
| -rw-r--r-- | pyGHDL/dom/InterfaceItem.py | 14 | ||||
| -rw-r--r-- | pyGHDL/dom/Object.py | 2 | ||||
| -rw-r--r-- | pyGHDL/dom/formatting/prettyprint.py | 3 |
3 files changed, 14 insertions, 5 deletions
diff --git a/pyGHDL/dom/InterfaceItem.py b/pyGHDL/dom/InterfaceItem.py index a4a94ec2d..c2cd3a2c9 100644 --- a/pyGHDL/dom/InterfaceItem.py +++ b/pyGHDL/dom/InterfaceItem.py @@ -57,14 +57,20 @@ class GenericConstantInterfaceItem(VHDLModel_GenericConstantInterfaceItem, GHDLM name = NodeToName(generic) mode = GetModeOfNode(generic) subTypeIndication = GetSubtypeIndicationFromNode(generic, "generic", name) - default = nodes.Get_Default_Value(generic); + default = nodes.Get_Default_Value(generic) value = GetExpressionFromNode(default) if default else None generic = cls(name, mode, subTypeIndication, value) return generic - def __init__(self, name: str, mode: Mode, subType: SubTypeOrSymbol, defaultExpression: Expression): + def __init__( + self, + name: str, + mode: Mode, + subType: SubTypeOrSymbol, + defaultExpression: Expression, + ): super().__init__(name=name, mode=mode) self._subType = subType self._defaultExpression = defaultExpression @@ -79,7 +85,9 @@ class PortSignalInterfaceItem(VHDLModel_PortSignalInterfaceItem, GHDLMixin): subTypeIndication = GetSubtypeIndicationFromNode(port, "port", name) defaultValue = nodes.Get_Default_Value(port) - value = GetExpressionFromNode(defaultValue) if defaultValue != Null_Iir else None + value = ( + GetExpressionFromNode(defaultValue) if defaultValue != Null_Iir else None + ) port = cls(name, mode, subTypeIndication, value) diff --git a/pyGHDL/dom/Object.py b/pyGHDL/dom/Object.py index 7250f7edd..bd37455ea 100644 --- a/pyGHDL/dom/Object.py +++ b/pyGHDL/dom/Object.py @@ -105,7 +105,7 @@ class Signal(VHDLModel_Signal): def parse(cls, node): name = NodeToName(node) subTypeIndication = GetSubtypeIndicationFromNode(node, "signal", name) - default = nodes.Get_Default_Value(node); + default = nodes.Get_Default_Value(node) defaultExpression = GetExpressionFromNode(default) if default else None signal = cls(name, subTypeIndication, defaultExpression) diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index 7129a30c4..59fdd485b 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -12,7 +12,8 @@ from pyVHDLModel.VHDLModel import ( PortInterfaceItem, BinaryExpression, IdentityExpression, - UnaryExpression, WithDefaultExpression, + UnaryExpression, + WithDefaultExpression, ) from pyGHDL import GHDLBaseException |