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| author | Patrick Lehmann <Patrick.Lehmann@plc2.de> | 2021-08-16 17:43:29 +0200 |
|---|---|---|
| committer | umarcor <unai.martinezcorral@ehu.eus> | 2021-08-23 16:35:36 +0200 |
| commit | c74c26bbb6b58e0cf7fba78e382f0949240b7721 (patch) | |
| tree | 00537a747112a41c82cd4daf3673fd4b6caa19bb /pyGHDL/dom | |
| parent | 2daa121cd8d40175a82c887b514208ff7f0a50da (diff) | |
| download | ghdl-c74c26bbb6b58e0cf7fba78e382f0949240b7721.tar.gz ghdl-c74c26bbb6b58e0cf7fba78e382f0949240b7721.tar.bz2 ghdl-c74c26bbb6b58e0cf7fba78e382f0949240b7721.zip | |
Handle if-statements.
Diffstat (limited to 'pyGHDL/dom')
| -rw-r--r-- | pyGHDL/dom/Sequential.py | 21 |
1 files changed, 7 insertions, 14 deletions
diff --git a/pyGHDL/dom/Sequential.py b/pyGHDL/dom/Sequential.py index 64a87e878..6e04b9a04 100644 --- a/pyGHDL/dom/Sequential.py +++ b/pyGHDL/dom/Sequential.py @@ -82,9 +82,7 @@ class IfBranch(VHDLModel_IfBranch): ) condition = GetExpressionFromNode(nodes.Get_Condition(branchNode)) - body = nodes.Get_Generate_Statement_Body(branchNode) - - statementChain = nodes.Get_Sequential_Statement_Chain(body) + statementChain = nodes.Get_Sequential_Statement_Chain(branchNode) statements = GetSequentialStatementsFromChainedNodes( statementChain, "if branch", label ) @@ -111,9 +109,7 @@ class ElsifBranch(VHDLModel_ElsifBranch): ) condition = GetExpressionFromNode(condition) - body = nodes.Get_Generate_Statement_Body(branchNode) - - statementChain = nodes.Get_Sequential_Statement_Chain(body) + statementChain = nodes.Get_Sequential_Statement_Chain(branchNode) statements = GetSequentialStatementsFromChainedNodes( statementChain, "elsif branch", label ) @@ -132,19 +128,16 @@ class ElseBranch(VHDLModel_ElseBranch): DOMMixin.__init__(self, branchNode) @classmethod - def parse(cls, elseNode: Iir, label: str) -> "ElseBranch": + def parse(cls, branchNode: Iir, label: str) -> "ElseBranch": from pyGHDL.dom._Translate import ( GetSequentialStatementsFromChainedNodes, ) - - body = nodes.Get_Generate_Statement_Body(elseNode) - - statementChain = nodes.Get_Sequential_Statement_Chain(body) + statementChain = nodes.Get_Sequential_Statement_Chain(branchNode) statements = GetSequentialStatementsFromChainedNodes( statementChain, "else branch", label ) - return cls(elseNode, statements) + return cls(branchNode, statements) @export @@ -168,7 +161,7 @@ class IfStatement(VHDLModel_IfStatement, DOMMixin): # WORKAROUND: Python 3.8 syntax # elseClause = generateNode # while (elseClause := nodes.Get_Generate_Else_Clause(elseClause)) != nodes.Null_Iir: - elseClause = nodes.Get_Generate_Else_Clause(ifNode) + elseClause = nodes.Get_Else_Clause(ifNode) while elseClause != nodes.Null_Iir: condition = nodes.Get_Condition(elseClause) if condition != nodes.Null_Iir: @@ -177,7 +170,7 @@ class IfStatement(VHDLModel_IfStatement, DOMMixin): elseBranch = ElseBranch.parse(elseClause, label) break - elseClause = nodes.Get_Generate_Else_Clause(elseClause) + elseClause = nodes.Get_Else_Clause(elseClause) return cls(ifNode, ifBranch, elsifBranches, elseBranch, label) |