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author | Patrick Lehmann <Patrick.Lehmann@plc2.de> | 2021-06-29 14:34:48 +0200 |
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committer | Patrick Lehmann <Patrick.Lehmann@plc2.de> | 2021-07-01 06:39:46 +0200 |
commit | c61eaa86a324db2dc1ee50004c1a505ae437b43d (patch) | |
tree | 533e8a35ce502001f3fa21b241e5407060185933 /pyGHDL/dom | |
parent | 6df51cb7d14d8e29d5aad0883d748f38f53115f1 (diff) | |
download | ghdl-c61eaa86a324db2dc1ee50004c1a505ae437b43d.tar.gz ghdl-c61eaa86a324db2dc1ee50004c1a505ae437b43d.tar.bz2 ghdl-c61eaa86a324db2dc1ee50004c1a505ae437b43d.zip |
Added Allocations.
Diffstat (limited to 'pyGHDL/dom')
-rw-r--r-- | pyGHDL/dom/Expression.py | 34 | ||||
-rw-r--r-- | pyGHDL/dom/_Translate.py | 2 |
2 files changed, 35 insertions, 1 deletions
diff --git a/pyGHDL/dom/Expression.py b/pyGHDL/dom/Expression.py index 3dc1271f2..91ff19f12 100644 --- a/pyGHDL/dom/Expression.py +++ b/pyGHDL/dom/Expression.py @@ -73,6 +73,8 @@ from pyVHDLModel.VHDLModel import ( ShiftLeftArithmeticExpression as VHDLModel_ShiftLeftArithmeticExpression, RotateRightExpression as VHDLModel_RotateRightExpression, RotateLeftExpression as VHDLModel_RotateLeftExpression, + SubtypeAllocation as VHDLModel_SubtypeAllocation, + QualifiedExpressionAllocation as VHDLModel_QualifiedExpressionAllocation, Aggregate as VHDLModel_Aggregate, Expression, AggregateElement, @@ -444,7 +446,37 @@ class QualifiedExpression(VHDLModel_QualifiedExpression, DOMMixin): typeMarkName = GetNameOfNode(nodes.Get_Type_Mark(node)) subType = SimpleSubTypeSymbol(node, typeMarkName) operand = GetExpressionFromNode(nodes.Get_Expression(node)) - return cls(node, subType, operand) + return cls(node, subtype, operand) + + +@export +class SubtypeAllocation(VHDLModel_SubtypeAllocation, DOMMixin): + def __init__(self, node: Iir, subtype: Symbol): + super().__init__(subtype) + DOMMixin.__init__(self, node) + + @classmethod + def parse(cls, node: Iir) -> "QualifiedExpressionAllocation": + from pyGHDL.dom._Translate import GetSubtypeIndicationFromNode + + subtype = GetSubtypeIndicationFromNode(node, "allocation", "?") + + return cls(node, subtype) + + +@export +class QualifiedExpressionAllocation(VHDLModel_QualifiedExpressionAllocation, DOMMixin): + def __init__(self, node: Iir, qualifiedExpression: QualifiedExpression): + super().__init__(qualifiedExpression) + DOMMixin.__init__(self, node) + + @classmethod + def parse(cls, node: Iir) -> "QualifiedExpressionAllocation": + from pyGHDL.dom._Translate import GetExpressionFromNode + + expression = GetExpressionFromNode(nodes.Get_Expression(node)) + + return cls(node, expression) @export diff --git a/pyGHDL/dom/_Translate.py b/pyGHDL/dom/_Translate.py index 6cc993de7..77b0d31d3 100644 --- a/pyGHDL/dom/_Translate.py +++ b/pyGHDL/dom/_Translate.py @@ -412,6 +412,8 @@ __EXPRESSION_TRANSLATION = { nodes.Iir_Kind.Ror_Operator: RotateRightExpression, nodes.Iir_Kind.Qualified_Expression: QualifiedExpression, nodes.Iir_Kind.Aggregate: Aggregate, + nodes.Iir_Kind.Allocator_By_Subtype: SubtypeAllocation, + nodes.Iir_Kind.Allocator_By_Expression: QualifiedExpressionAllocation, } |