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author | Patrick Lehmann <Patrick.Lehmann@plc2.de> | 2021-06-30 12:20:54 +0200 |
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committer | Patrick Lehmann <Patrick.Lehmann@plc2.de> | 2021-07-01 06:39:46 +0200 |
commit | 03f5a6cd6f88aef6c6580f471905403056313f05 (patch) | |
tree | 2575a3e277dbb27fcc196d8121a7528cf348faff /pyGHDL/dom | |
parent | 8a815d48790db46652034b6a72a581b0c9f40f40 (diff) | |
download | ghdl-03f5a6cd6f88aef6c6580f471905403056313f05.tar.gz ghdl-03f5a6cd6f88aef6c6580f471905403056313f05.tar.bz2 ghdl-03f5a6cd6f88aef6c6580f471905403056313f05.zip |
Exchanged sides in asserts to the understanding of pytests actual vs. expected order.
Diffstat (limited to 'pyGHDL/dom')
-rw-r--r-- | pyGHDL/dom/Range.py | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/pyGHDL/dom/Range.py b/pyGHDL/dom/Range.py index d091be1c6..ce8dfbc40 100644 --- a/pyGHDL/dom/Range.py +++ b/pyGHDL/dom/Range.py @@ -44,9 +44,4 @@ __all__ = [] @export class Range(VHDLModel_Range): - def __init__(self, left: Expression, right: Expression, direction: Direction): - super().__init__() - - self._leftBound = left - self._rightBound = right - self._direction = direction + pass |